The development of a software and hardware-in-the-loop test system for ITU-PSAT II nano satellite ADCS

In this work, we present the operational concept of ITU-PSAT II, the reconfigurable fault-tolerant ADCS architecture and the associated Software and Hardware-in-the-Loop Test System for three-axis active control. ADCS of ITU PSAT II consists of three distinct hardware layers integrating sensors, actuators, and ADCS computer over the CAN bus. A multi mode control algorithm which acts over different operation modes and actuator / sensor failure scenarios, along with simulation results, is provided. For testing operational properties of ADCS, a Software and Hardware-in-the-Loop Test system were developed. The system includes direct satellite-bus emulation, integration of satellite hardware, an air bearing table and the Helmholtz Coil magnetic field emulator.