Özet
We present an FPGA implementation of a new multiplier for binary finite fields that combines two previously known methods. The multiplier is designed for polynomial bases which allow more flexibility in hardware and is dedicated to efficient implementations of elliptic curve cryptography. An extension to a digit-serial architecture is also sketched. For the introduced architecture we also discuss resistance to side-channel attacks.
| Orijinal dil | İngilizce |
|---|---|
| Sayfalar | 779-782 |
| Sayfa sayısı | 4 |
| Yayın durumu | Yayınlandı - 2004 |
| Harici olarak yayınlandı | Evet |
| Etkinlik | Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference, MELECON 2004 - Dubrovnik, Croatia Süre: 12 May 2004 → 15 May 2004 |
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| ???event.eventtypes.event.conference??? | Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference, MELECON 2004 |
|---|---|
| Ülke/Bölge | Croatia |
| Şehir | Dubrovnik |
| Periyot | 12/05/04 → 15/05/04 |
Parmak izi
Serial multiplier architectures over GF2n for elliptic curve cryptosystems' araştırma başlıklarına git. Birlikte benzersiz bir parmak izi oluştururlar.Alıntı Yap
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