Sayisal nesne iskeletleştirme tasarimi

Melike Atay, Müştak E. Yalçin

Araştırma sonucu: ???type-name???Konferans katkısıbilirkişi

Özet

In this studyareal time skeletonization system is implemented on FPGA. Skeletonization forms the backbone of many tracking and matching applications in image processing. The computational complexity of the skeletonization algorithms highly increases to reach a performance close to perfect skeleton. This complexity makes it impossible for the systems to cope with real time requirements. Thus, in this work an FPGA suitable algorithm is elected for the implementation and the algorithm is extended by adding new rules to improve the performace of the output skeletons. A fully parallelized architecture is proposed to implement the extended skeleton extraction algorithm on FPGA. Performance of the novel algorithm is evaluated according to the widely acknowledged performance measures for skeletonization research. Resource utilization and timing performance of the FPGA implementation are investigated for comparison with similar systems in literature.

Tercüme edilen katkı başlığıDigital design of skeletonization
Orijinal dilTürkçe
Ana bilgisayar yayını başlığı2014 22nd Signal Processing and Communications Applications Conference, SIU 2014 - Proceedings
YayınlayanIEEE Computer Society
Sayfalar718-721
Sayfa sayısı4
ISBN (Basılı)9781479948741
DOI'lar
Yayın durumuYayınlandı - 2014
Etkinlik2014 22nd Signal Processing and Communications Applications Conference, SIU 2014 - Trabzon, Turkey
Süre: 23 Nis 201425 Nis 2014

Yayın serisi

Adı2014 22nd Signal Processing and Communications Applications Conference, SIU 2014 - Proceedings

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???event.eventtypes.event.conference???2014 22nd Signal Processing and Communications Applications Conference, SIU 2014
Ülke/BölgeTurkey
ŞehirTrabzon
Periyot23/04/1425/04/14

Keywords

  • FPGA
  • Object Recognition
  • Object Tracking
  • Skeletonization

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