TY - GEN
T1 - Realization of processing blocks of CNN based CASA system on CPU and FPGA
AU - Şavkay, O. Levent
AU - Cesur, Evren
AU - Yildiz, Nerhun
AU - Yalcin, Müştak E.
AU - Tavşanoǧlu, Vedat
PY - 2014
Y1 - 2014
N2 - In this paper, hardware optimization of the preprocessing and software implementation of the processing blocks of a computer-aided semen analysis (CASA) system are proposed, which is also implemented on an FPGA and ARM device as a working prototype. The software implementation of the track initialization, track maintenance, data validation and classification blocks of the processing part are implemented on a Zynq7000 ARM Cortex-A9 processor. In the preprocessing part, a real-time cellular neural network (CNN) emulator (RTCNNP-v2) is used for the realization of the image processing algorithms, whose regular, flexible and reconfigurable infrastructure simplifies the prototyping process. The CASA system introduced in this paper is capable of processing full-HD 1080p@60 (1080 × 1920) video images in real-time.
AB - In this paper, hardware optimization of the preprocessing and software implementation of the processing blocks of a computer-aided semen analysis (CASA) system are proposed, which is also implemented on an FPGA and ARM device as a working prototype. The software implementation of the track initialization, track maintenance, data validation and classification blocks of the processing part are implemented on a Zynq7000 ARM Cortex-A9 processor. In the preprocessing part, a real-time cellular neural network (CNN) emulator (RTCNNP-v2) is used for the realization of the image processing algorithms, whose regular, flexible and reconfigurable infrastructure simplifies the prototyping process. The CASA system introduced in this paper is capable of processing full-HD 1080p@60 (1080 × 1920) video images in real-time.
UR - http://www.scopus.com/inward/record.url?scp=84907411217&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2014.6865576
DO - 10.1109/ISCAS.2014.6865576
M3 - Conference contribution
AN - SCOPUS:84907411217
SN - 9781479934324
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 2081
EP - 2084
BT - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Y2 - 1 June 2014 through 5 June 2014
ER -