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Power/area analysis and optimization of a DS-SS receiver for an integrated sensor microsystem

  • University of Edinburgh
  • University of Glasgow

Araştırma sonucu: Kitap/Rapor/Konferans Bildirisinde BölümKonferans katkısıbilirkişi

1 Atıf (Scopus)

Özet

Communication systems targeting miniaturized sensor microsystem networks are characterized by their restricted power and area constraints. When considering the design of telecommunication system for such a network, the receiver is the key performance critical block. This paper describes research work carried out on studying the impact of input data characteristics and resolution and internal data path complexity on area and power performance of the receiver. We have constructed a number of transmitter/receiver architectures and analyzed their power/area. We demonstrate that up to 59[%] and 11[%] savings in area and power respectively could be achieved by optimizing input data size and internal register width for a particular application while maintaining signal quality.

Orijinal dilİngilizce
Ana bilgisayar yayını başlığıProceedings - Euromicro Symposium on Digital System Design, DSD 2003
YayınlayanInstitute of Electrical and Electronics Engineers Inc.
Sayfalar402-406
Sayfa sayısı5
ISBN (Elektronik)0769520030, 9780769520032
DOI'lar
Yayın durumuYayınlandı - 2003
Harici olarak yayınlandıEvet
EtkinlikEuromicro Symposium on Digital System Design, DSD 2003 - Belek-Antalya, Türkiye
Süre: 1 Eyl 20036 Eyl 2003

Yayın serisi

AdıProceedings - Euromicro Symposium on Digital System Design, DSD 2003

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???event.eventtypes.event.conference???Euromicro Symposium on Digital System Design, DSD 2003
Ülke/BölgeTürkiye
ŞehirBelek-Antalya
Periyot1/09/036/09/03

Bibliyografik not

Publisher Copyright:
© 2003 IEEE.

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