Improving the bandwidth of the transimpedance amplifier based on CS stages in cascode configuration using impedance matching techniques

This paper describes a matching technique to improve the bandwidth of multi-GHz frequency ranges for the transimpedance amplifier. It is shown that by simultaneously using of series input matching topology and T-output matching network, the bandwidth of the TIA can be obviously improved. This methodology is supported by a design example in a 0.18 μm CMOS technology. The post layout simulation results show a −3dB bandwidth of 20 GHz with 50 fF photodiode capacitance, a transimpedance gain of 52.6dBΩ, 11pA/Hz input referred noise and group delay less than 8.3ps. The TIA dissipates 1.3mW from a 1.8V supply voltage.