Implementation of Dynamically Configurable Modulator on FPGA

Digital modulation schemes are used to make messages suitable for communication. Each modulation scheme is designed with a different approach and has advantages over others. The modulation scheme of a system is selected according to the requirements of the system. It can be required to implement multiple modulations in a single system. Yet, implementing two or more modulations individually has power and area cost. To decrease these costs, a dynamically configurable architecture can be employed. On the other hand, dynamic configuration requires configuration data. That data can be stored in memory or read from an input. In both cases, memory and time overhead occurs. In this study, a dynamically configurable modulator architecture is implemented with a novel approach. The modulator of the system can be configured as Binary Phase Shift Keying (BPSK), Quadrature Phase Shift Keying (QPSK), Minimum Shift Keying (MSK) or Gaussian Minimum Shift Keying (GMSK) modulator. An array of blocks is implemented in the proposed system. These blocks can be activated or deactivated on run time. The combination of activated blocks results in BPSK, QPSK, MSK, or GMSK modulator. Therefore, the configuration does not cause any extra delay and does not require configuration data. The proposed system is implemented on XC7A200T Xilinx FPGA and the outputs of modulators are examined using Xilinx Vivado tool. The implementation result shows that proposed system utilizes 20% fewer resources and decreases power consumption by 20% compared to the system which implements modulators individually.