@inproceedings{1dd660777eda4efd8a607cb5397bb9ba,
title = "G{\"o}r{\"u}nt{\"u} iyile{\c s}tirme i{\c s}lemcisi ve uygulamalari",
abstract = "Nowadays, low cost, flexible, and high performance hardware-software co-design implementation of widely used image filtering methods is very important. In this work, image filtering processor is implemented through convolution, designed in Verilog Hardware Description Language, and softcore microprocessor. Microprocessor is synthesized on FPGA and removing of salt and pepper noises is examined. Convolution hardware is designed with and without DSP48 slice, which is dedicated hardware in FPGA, and obtained datas are compared. Also, synthesize of softcore microprocessor on FPGA is implemented for these two design and obtained datas are compared. Finally, one of selected basic algorithm is implemented on co-design and PSNR values are given.",
keywords = "convolution, dsp48, filter, fpga, image, microprocessor, psnr, salt and pepper",
author = "Bagbaba, {Ahmet Cagri} and Berna Ors and Erozan, {Ahmet Turan}",
year = "2014",
doi = "10.1109/SIU.2014.6830653",
language = "T{\"u}rk{\c c}e",
isbn = "9781479948741",
series = "2014 22nd Signal Processing and Communications Applications Conference, SIU 2014 - Proceedings",
publisher = "IEEE Computer Society",
pages = "2011--2014",
booktitle = "2014 22nd Signal Processing and Communications Applications Conference, SIU 2014 - Proceedings",
address = "United States",
note = "2014 22nd Signal Processing and Communications Applications Conference, SIU 2014 ; Conference date: 23-04-2014 Through 25-04-2014",
}