Özet
Fault tolerance is a critical aspect of modern electronic systems, particularly in environments like space, aviation, and automotive, where reliability is paramount. This paper examines the fault tolerance approaches in RISC-V architectures. Techniques such as spatial, temporal, and information redundancy are reviewed, with a focus on their integration into RISC-V-based systems. Comparative analysis of single-core and multi-core redundancy, including modular and heterogeneous approaches, demonstrates their impact on performance, energy efficiency, and cost. Testing methods ranging from simulation to real-world radiation exposure are evaluated. Finally, insights into future research opportunities are presented to guide the development of more robust and efficient fault-tolerant systems.
| Orijinal dil | İngilizce |
|---|---|
| Ana bilgisayar yayını başlığı | 2025 12th International Conference on Electrical and Electronics Engineering, ICEEE 2025 |
| Yayınlayan | Institute of Electrical and Electronics Engineers Inc. |
| Sayfalar | 19-23 |
| Sayfa sayısı | 5 |
| ISBN (Elektronik) | 9798331598440 |
| DOI'lar | |
| Yayın durumu | Yayınlandı - 2025 |
| Etkinlik | 12th International Conference on Electrical and Electronics Engineering, ICEEE 2025 - Istanbul, Turkey Süre: 24 Eyl 2025 → 26 Eyl 2025 |
Yayın serisi
| Adı | 2025 12th International Conference on Electrical and Electronics Engineering, ICEEE 2025 |
|---|
???event.eventtypes.event.conference???
| ???event.eventtypes.event.conference??? | 12th International Conference on Electrical and Electronics Engineering, ICEEE 2025 |
|---|---|
| Ülke/Bölge | Turkey |
| Şehir | Istanbul |
| Periyot | 24/09/25 → 26/09/25 |
Bibliyografik not
Publisher Copyright:© 2025 IEEE.
Parmak izi
Exploring Fault-Tolerance in RISC-V Architectures' araştırma başlıklarına git. Birlikte benzersiz bir parmak izi oluştururlar.Alıntı Yap
- APA
- Author
- BIBTEX
- Harvard
- Standard
- RIS
- Vancouver