TY - GEN
T1 - Differential power analysis resistant hardware implementation of the RSA cryptosystem
AU - Bayam, Keklik Alptekin
AU - Ors, Berna
PY - 2008
Y1 - 2008
N2 - In this paper, RSA cryptosystem was implemented on an FPGA as resistant against Differential Power Analysis attacks. There are hardware and algorithmic countermeasures against power analysis attacks. This is the first FPGA realization of an algorithmic countermeasure which makes RSA resistant to power analysis attacks. Modular exponentiation is realized with Montgomery Modular Multiplication. The Montgomery modular multiplier has been realized with carry save adders. Carry save representation has been used throughout the RSA encryption algorithm. The protected implementation resulted in 66,66 MHz of clock frequency, 84,42 Kb/s of throughput, and 6,06 ms of total exponentiation time and occupied an area of 10986 slices with the use of the built-in block SelectRAM structure inside XCV1000E.
AB - In this paper, RSA cryptosystem was implemented on an FPGA as resistant against Differential Power Analysis attacks. There are hardware and algorithmic countermeasures against power analysis attacks. This is the first FPGA realization of an algorithmic countermeasure which makes RSA resistant to power analysis attacks. Modular exponentiation is realized with Montgomery Modular Multiplication. The Montgomery modular multiplier has been realized with carry save adders. Carry save representation has been used throughout the RSA encryption algorithm. The protected implementation resulted in 66,66 MHz of clock frequency, 84,42 Kb/s of throughput, and 6,06 ms of total exponentiation time and occupied an area of 10986 slices with the use of the built-in block SelectRAM structure inside XCV1000E.
KW - Carry save adder
KW - Differential power analysis attack
KW - Montgomery modular multiplier
KW - RSA
KW - Randomized table window method
KW - Side-channel attacks
UR - https://www.scopus.com/pages/publications/51749101682
U2 - 10.1109/ISCAS.2008.4542167
DO - 10.1109/ISCAS.2008.4542167
M3 - Conference contribution
AN - SCOPUS:51749101682
SN - 9781424416844
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 3314
EP - 3317
BT - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
T2 - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Y2 - 18 May 2008 through 21 May 2008
ER -