Defect-tolerant logic synthesis for memristor crossbars with performance evaluation

Onur Tunali, M. Ceylan Morgul, Mustafa Altun

Araştırma sonucu: Dergiye katkıMakalebilirkişi

6 Atıf (Scopus)

Özet

In this paper, we study defect-tolerant logic synthesis of memristor-based crossbar architectures. We propose a hybrid algorithm, combining heuristic and exact algorithms, that achieves perfect tolerance for 10-percent stuck-at open defect rates. Along with defect tolerance, we also consider area, delay, and power costs of the memristor crossbars to elaborate on two-level and multi-level logic designs.

Orijinal dilİngilizce
Makale numarası8474945
Sayfa (başlangıç-bitiş)22-31
Sayfa sayısı10
DergiIEEE Micro
Hacim38
Basın numarası5
DOI'lar
Yayın durumuYayınlandı - 1 Eyl 2018

Bibliyografik not

Publisher Copyright:
© 1981-2012 IEEE.

Finansman

This work is part of a project that has received funding from the European Union’s Horizon 2020 research and innovation program under the Marie Skłodowska-Curie grant agreement No. 691178. This work is supported by the TUBITAK-Career project #113E760.

FinansörlerFinansör numarası
Marie Skłodowska-Curie113E760
Horizon 2020 Framework Programme691178

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