Özet
In this paper, we study defect-tolerant logic synthesis of memristor-based crossbar architectures. We propose a hybrid algorithm, combining heuristic and exact algorithms, that achieves perfect tolerance for 10-percent stuck-at open defect rates. Along with defect tolerance, we also consider area, delay, and power costs of the memristor crossbars to elaborate on two-level and multi-level logic designs.
Orijinal dil | İngilizce |
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Makale numarası | 8474945 |
Sayfa (başlangıç-bitiş) | 22-31 |
Sayfa sayısı | 10 |
Dergi | IEEE Micro |
Hacim | 38 |
Basın numarası | 5 |
DOI'lar | |
Yayın durumu | Yayınlandı - 1 Eyl 2018 |
Bibliyografik not
Publisher Copyright:© 1981-2012 IEEE.
Finansman
This work is part of a project that has received funding from the European Union’s Horizon 2020 research and innovation program under the Marie Skłodowska-Curie grant agreement No. 691178. This work is supported by the TUBITAK-Career project #113E760.
Finansörler | Finansör numarası |
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Marie Skłodowska-Curie | 113E760 |
Horizon 2020 Framework Programme | 691178 |