Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process

Sadik Ilik; Nergiz Şahin Solmaz; Aykut Kabaoǧlu; Mustafa Berke Yelten

doi:10.1109/SMACD.2019.8795230

Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process

Sadik Ilik, Nergiz Şahin Solmaz, Aykut Kabaoǧlu, Mustafa Berke Yelten

Elektronik ve Hab.Müh.Bölümü

Istanbul Technical University

Araştırma sonucu: ???type-name??? › Konferans katkısı › bilirkişi

1 Atıf (Scopus)

Özet

Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.

Orijinal dil	İngilizce
Ana bilgisayar yayını başlığı	SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings
Yayınlayan	Institute of Electrical and Electronics Engineers Inc.
Sayfalar	21-24
Sayfa sayısı	4
ISBN (Elektronik)	9781728112015
DOI'lar	https://doi.org/10.1109/SMACD.2019.8795230
Yayın durumu	Yayınlandı - Tem 2019
Etkinlik	16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019 - Lausanne, Switzerland Süre: 15 Tem 2019 → 18 Tem 2019

Yayın serisi

Adı	SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???	16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019
Ülke/Bölge	Switzerland
Şehir	Lausanne
Periyot	15/07/19 → 18/07/19

Bibliyografik not

Publisher Copyright:
© 2019 IEEE.

Finansman

ACKNOWLEDGMENT This work was sponsored by the Technological Research Council of Turkey under the project TÜB˙TAK 1001 215E080. The authors would like to thank to Prof. Sevilay Hacıyakupog˘lu for valuable technical discussions, as well as, to the Turkish Atomic Energy Authority, particularly Mr. Zati Ünal, for his kind technical help during preparation of the experimental setup. This work was sponsored by the Technological Research Council of Turkey under the project TUBITAK 1001 215E080. The authors would like to thank to Prof. Sevilay Haciyakupo?lu for valuable technical discussions, as well as, to the Turkish Atomic Energy Authority, particularly Mr. Zati ?nal, for his kind technical help during preparation of the experimental setup.

Finansörler	Finansör numarası
Technological Research Council of Turkey	TÜB˙TAK 1001 215E080
Türkiye Atom Enerjisi Kurumu

Belgeye Erişim

10.1109/SMACD.2019.8795230

Diğer Dosyalar ve Linkler

Link to publication in Scopus

Alıntı Yap

Ilik, S., Şahin Solmaz, N., Kabaoǧlu, A., & Yelten, M. B. (2019). Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. In SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings (pp. 21-24). Makale 8795230 (SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SMACD.2019.8795230

Ilik, Sadik ; Şahin Solmaz, Nergiz ; Kabaoǧlu, Aykut et al. / Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 21-24 (SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings).

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title = "Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process",

abstract = "Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.",

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author = "Sadik Ilik and {{\c S}ahin Solmaz}, Nergiz and Aykut Kabaoǧlu and Yelten, {Mustafa Berke}",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019 ; Conference date: 15-07-2019 Through 18-07-2019",

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doi = "10.1109/SMACD.2019.8795230",

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Ilik, S, Şahin Solmaz, N, Kabaoǧlu, A & Yelten, MB 2019, Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. in SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings., 8795230, SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. 21-24, 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019, Lausanne, Switzerland, 15/07/19. https://doi.org/10.1109/SMACD.2019.8795230

Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. / Ilik, Sadik; Şahin Solmaz, Nergiz; Kabaoǧlu, Aykut et al.
SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. p. 21-24 8795230 (SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings).

Araştırma sonucu: ???type-name??? › Konferans katkısı › bilirkişi

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AU - Ilik, Sadik

AU - Şahin Solmaz, Nergiz

AU - Kabaoǧlu, Aykut

AU - Yelten, Mustafa Berke

PY - 2019/7

Y1 - 2019/7

N2 - Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.

AB - Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.

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Ilik S, Şahin Solmaz N, Kabaoǧlu A, Yelten MB. Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. In SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings. Institute of Electrical and Electronics Engineers Inc. 2019. p. 21-24. 8795230. (SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings). doi: 10.1109/SMACD.2019.8795230

Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process

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