TY - JOUR
T1 - Code generator for implementing dual tree complex wavelet transform on reconfigurable architectures for mobile applications
AU - Canbay, Ferhat
AU - Levent, Vecdi Emre
AU - Serbes, Gorkem
AU - Ugurdag, H. Fatih
AU - Goren, Sezer
AU - Aydin, Nizamettin
N1 - Publisher Copyright:
© 2016 The Institution of Engineering and Technology.
PY - 2016
Y1 - 2016
N2 - The authors aimed to develop an application for producing different architectures to implement dual tree complex wavelet transform (DTCWT) having near shift-invariance property. To obtain a low-cost and portable solution for implementing the DTCWT in multi-channel real-time applications, various embedded-system approaches are realised. For comparison, the DTCWT was implemented in C language on a personal computer and on a PIC microcontroller. However, in the former approach portability and in the latter desired speed performance properties cannot be achieved. Hence, implementation of the DTCWT on a reconfigurable platform such as field programmable gate array, which provides portable, low-cost, low-power, and high-performance computing, is considered as the most feasible solution. At first, they used the system generator DSP design tool of Xilinx for algorithm design. However, the design implemented by using such tools is not optimised in terms of area and power. To overcome all these drawbacks mentioned above, they implemented the DTCWT algorithm by using Verilog Hardware Description Language, which has its own difficulties. To overcome these difficulties, simplify the usage of proposed algorithms and the adaptation procedures, a code generator program that can produce different architectures is proposed.
AB - The authors aimed to develop an application for producing different architectures to implement dual tree complex wavelet transform (DTCWT) having near shift-invariance property. To obtain a low-cost and portable solution for implementing the DTCWT in multi-channel real-time applications, various embedded-system approaches are realised. For comparison, the DTCWT was implemented in C language on a personal computer and on a PIC microcontroller. However, in the former approach portability and in the latter desired speed performance properties cannot be achieved. Hence, implementation of the DTCWT on a reconfigurable platform such as field programmable gate array, which provides portable, low-cost, low-power, and high-performance computing, is considered as the most feasible solution. At first, they used the system generator DSP design tool of Xilinx for algorithm design. However, the design implemented by using such tools is not optimised in terms of area and power. To overcome all these drawbacks mentioned above, they implemented the DTCWT algorithm by using Verilog Hardware Description Language, which has its own difficulties. To overcome these difficulties, simplify the usage of proposed algorithms and the adaptation procedures, a code generator program that can produce different architectures is proposed.
UR - http://www.scopus.com/inward/record.url?scp=85041856757&partnerID=8YFLogxK
U2 - 10.1049/htl.2016.0034
DO - 10.1049/htl.2016.0034
M3 - Article
AN - SCOPUS:85041856757
SN - 2053-3713
VL - 3
SP - 184
EP - 188
JO - Healthcare Technology Letters
JF - Healthcare Technology Letters
IS - 3
ER -