CMOS high-precision loser-take-all circuit

This paper presents a new current-mode CMOS loser-take-all circuit. The proposed circuit consists of a basic cell that allows implementation of a multi-input configuration by repeating the cell for each additional input. A high-speed feedback structure is employed to determine the minimum current among the applied inputs. The significant feature of the circuit is its high accuracy and high-speed operation. Additionally, the input dynamic range of the circuit can be efficiently controlled via the biasing current. HSPICE simulation results are presented to verify the performance of the circuit, where under a supply voltage of 2.5 V, bias current of 100 μA, and frequency of 10 MHz, the input dynamic range increases within 0-100 μA and the corresponding error remains as low as 0.4%.