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Analyzing and comparing the Montgomery multiplication algorithms for their power consumption

  • Dilek Bayhan*
  • , S. Berna Ors
  • , Gokay Saldamli
  • *Bu çalışma için yazışmadan sorumlu yazar

Araştırma sonucu: Kitap/Rapor/Konferans Bildirisinde BölümKonferans katkısıbilirkişi

7 Atıf (Scopus)

Özet

This study analyses and compares the most popular Montgomery multiplication algorithms for their power dissipation on FPGA devices. Among various architectures proposed for Montgomery multiplication, we pick the parallel, sequential and systolic variants as the most revealing ones for our experimental needs. The synthesis results indicate that the sequential setting with a single cell gives the most efficient employment of the algorithm for dynamic power dissipation. However, if the energy is considered the parallel architecture is the most appropriate choice. Our analyses provides a fair comparison of power consumption of Montgomery multiplication algorithms on FPGAs giving hints to the engineers realizing the core of the most popular methods used in public-key cryptographic systems such as RSA, Diffie-Hellman, ECC and others.

Orijinal dilİngilizce
Ana bilgisayar yayını başlığıProceedings, ICCES'2010 - 2010 International Conference on Computer Engineering and Systems
Sayfalar257-261
Sayfa sayısı5
DOI'lar
Yayın durumuYayınlandı - 2010
Etkinlik2010 6th International Conference on Computer Engineering and Systems, ICCES'2010 - Cairo, Egypt
Süre: 30 Kas 20101 Ara 2010

Yayın serisi

AdıProceedings, ICCES'2010 - 2010 International Conference on Computer Engineering and Systems

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???event.eventtypes.event.conference???2010 6th International Conference on Computer Engineering and Systems, ICCES'2010
Ülke/BölgeEgypt
ŞehirCairo
Periyot30/11/101/12/10

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