An FPGA implementation of an elliptic curve processor over GF(2 m)

Nele Mentens; Siddika Berna Örs; Bart Preneel

An FPGA implementation of an elliptic curve processor over GF(2 ^m)

Nele Mentens^*, Siddika Berna Örs, Bart Preneel

^*Bu çalışma için yazışmadan sorumlu yazar

KU Leuven

Araştırma sonucu: Kitap/Rapor/Konferans Bildirisinde Bölüm › Konferans katkısı › bilirkişi

30 Atıf (Scopus)

Özet

This paper describes a hardware implementation of an arithmetic processor which is efficient for elliptic curve (EC) cryptosystems, which are becoming increasingly popular as an alternative for public key cryptosystems based on factoring. The modular multiplication is implemented using a Montgomery modular multiplication in a systolic array architecture, which has the advantage that the clock frequency becomes independent of the bit length m.

Orijinal dil	İngilizce
Ana bilgisayar yayını başlığı	Proceedings of the 2004 ACM Great Lakes Symposium on VLSI, GLSVLSI 2004
Ana bilgisayar yayını alt yazısı	VLSI in the Nanometer Era
Sayfalar	454-457
Sayfa sayısı	4
Yayın durumu	Yayınlandı - 2004
Harici olarak yayınlandı	Evet
Etkinlik	Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era - Boston, MA, United States Süre: 26 Nis 2004 → 28 Nis 2004

Yayın serisi

Adı	Proceedings of the ACM Great Lakes Symposium on VLSI

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???	Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era
Ülke/Bölge	United States
Şehir	Boston, MA
Periyot	26/04/04 → 28/04/04

Diğer Dosyalar ve Linkler

Link to publication in Scopus

Alıntı Yap

@inproceedings{9d1d38ef050a4782996573271fa42db8,

title = "An FPGA implementation of an elliptic curve processor over GF(2 m)",

abstract = "This paper describes a hardware implementation of an arithmetic processor which is efficient for elliptic curve (EC) cryptosystems, which are becoming increasingly popular as an alternative for public key cryptosystems based on factoring. The modular multiplication is implemented using a Montgomery modular multiplication in a systolic array architecture, which has the advantage that the clock frequency becomes independent of the bit length m.",

keywords = "Elliptic Curve Cryptosystems, FPGA, Montgomery Modular Multiplication",

author = "Nele Mentens and {\"O}rs, {Siddika Berna} and Bart Preneel",

year = "2004",

language = "English",

isbn = "1581138539",

series = "Proceedings of the ACM Great Lakes Symposium on VLSI",

pages = "454--457",

booktitle = "Proceedings of the 2004 ACM Great Lakes Symposium on VLSI, GLSVLSI 2004",

note = "Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era ; Conference date: 26-04-2004 Through 28-04-2004",

}

Mentens, N, Örs, SB & Preneel, B 2004, An FPGA implementation of an elliptic curve processor over GF(2 ^m). in Proceedings of the 2004 ACM Great Lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era. Proceedings of the ACM Great Lakes Symposium on VLSI, pp. 454-457, Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era, Boston, MA, United States, 26/04/04.

An FPGA implementation of an elliptic curve processor over GF(2 ^m). / Mentens, Nele; Örs, Siddika Berna; Preneel, Bart.
Proceedings of the 2004 ACM Great Lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era. 2004. p. 454-457 (Proceedings of the ACM Great Lakes Symposium on VLSI).

Araştırma sonucu: Kitap/Rapor/Konferans Bildirisinde Bölüm › Konferans katkısı › bilirkişi

TY - GEN

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AU - Mentens, Nele

AU - Örs, Siddika Berna

AU - Preneel, Bart

PY - 2004

Y1 - 2004

N2 - This paper describes a hardware implementation of an arithmetic processor which is efficient for elliptic curve (EC) cryptosystems, which are becoming increasingly popular as an alternative for public key cryptosystems based on factoring. The modular multiplication is implemented using a Montgomery modular multiplication in a systolic array architecture, which has the advantage that the clock frequency becomes independent of the bit length m.

AB - This paper describes a hardware implementation of an arithmetic processor which is efficient for elliptic curve (EC) cryptosystems, which are becoming increasingly popular as an alternative for public key cryptosystems based on factoring. The modular multiplication is implemented using a Montgomery modular multiplication in a systolic array architecture, which has the advantage that the clock frequency becomes independent of the bit length m.

KW - Elliptic Curve Cryptosystems

KW - FPGA

KW - Montgomery Modular Multiplication

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M3 - Conference contribution

AN - SCOPUS:2942754025

SN - 1581138539

T3 - Proceedings of the ACM Great Lakes Symposium on VLSI

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BT - Proceedings of the 2004 ACM Great Lakes Symposium on VLSI, GLSVLSI 2004

T2 - Proceedings of the 2004 ACM Great lakes Symposium on VLSI, GLSVLSI 2004: VLSI in the Nanometer Era

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