A new architecture for emulating CNN with template learning on FPGA

Erdem Köse; Müştak E. Yalçın

A new architecture for emulating CNN with template learning on FPGA

Erdem Köse
, Müştak E. Yalçın

Elektronik ve Hab.Müh.Bölümü

Gebze Technical University

Araştırma sonucu: Kitap/Rapor/Konferans Bildirisinde Bölüm › Konferans katkısı › bilirkişi

1 Atıf (Scopus)

Özet

—Cellular Neural Network with time invariant weights is being used in computer vision applications. There are many ways to implement CNNs for real time image processing. VLSI and FPGA technologies are getting better day by day. In our study we improved our previous system-on-chip implementation of CNNs. Improved CNN system-on-chip processor is built on an improved CNN emulator design and a better processor core which performs a new template learning algorithm is shown. SoC is programmed to perform a sequential CNN operations on different input and state images with different templates which are now can be stored in DDR2 RAM. Upgraded system design allows that templates can be more dynamically updated by the new learning algoritm in run time. System is implemented on Spartan 6 FPGA and tests results are presented and compared.

Orijinal dil	İngilizce
Ana bilgisayar yayını başlığı	CNNA 2018 - 16th International Workshop on Cellular Nanoscale Networks and Their Applications
Editörler	Akos Zarandy
Yayınlayan	IEEE Computer Society
Sayfalar	103
Sayfa sayısı	1
ISBN (Elektronik)	9783800747665
Yayın durumu	Yayınlandı - 2018
Etkinlik	16th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2018 - Budapest, Hungary Süre: 28 Ağu 2018 → 30 Ağu 2018

Yayın serisi

Adı	International Workshop on Cellular Nanoscale Networks and their Applications
Hacim	2018-August
ISSN (Basılı)	2165-0160
ISSN (Elektronik)	2165-0179

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???	16th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2018
Ülke/Bölge	Hungary
Şehir	Budapest
Periyot	28/08/18 → 30/08/18

Bibliyografik not

Publisher Copyright:
© VDE VERLAG GMBH.

Finansman

VI. ACKNOWLEDGMENTS This work was supported by Istanbul Technical University, under the project MGA-2017-40679 and ITU-AYP-2017-07.

Finansörler	Finansör numarası
Istanbul Teknik Üniversitesi	ITU-AYP-2017-07, MGA-2017-40679

Diğer Dosyalar ve Linkler

Link to publication in Scopus

Alıntı Yap

@inproceedings{b30b03260132419eaa9e298690d9c05d,

title = "A new architecture for emulating CNN with template learning on FPGA",

abstract = "—Cellular Neural Network with time invariant weights is being used in computer vision applications. There are many ways to implement CNNs for real time image processing. VLSI and FPGA technologies are getting better day by day. In our study we improved our previous system-on-chip implementation of CNNs. Improved CNN system-on-chip processor is built on an improved CNN emulator design and a better processor core which performs a new template learning algorithm is shown. SoC is programmed to perform a sequential CNN operations on different input and state images with different templates which are now can be stored in DDR2 RAM. Upgraded system design allows that templates can be more dynamically updated by the new learning algoritm in run time. System is implemented on Spartan 6 FPGA and tests results are presented and compared.",

author = "Erdem K{\"o}se and Yal{\c c}ın, \{M{\"u}{\c s}tak E.\}",

note = "Publisher Copyright: {\textcopyright} VDE VERLAG GMBH.; 16th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2018 ; Conference date: 28-08-2018 Through 30-08-2018",

year = "2018",

language = "English",

series = "International Workshop on Cellular Nanoscale Networks and their Applications",

publisher = "IEEE Computer Society",

pages = "103",

editor = "Akos Zarandy",

booktitle = "CNNA 2018 - 16th International Workshop on Cellular Nanoscale Networks and Their Applications",

address = "United States",

}

Köse, E & Yalçın, ME 2018, A new architecture for emulating CNN with template learning on FPGA. in A Zarandy (ed.), CNNA 2018 - 16th International Workshop on Cellular Nanoscale Networks and Their Applications. International Workshop on Cellular Nanoscale Networks and their Applications, hac. 2018-August, IEEE Computer Society, pp. 103, 16th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2018, Budapest, Hungary, 28/08/18.

A new architecture for emulating CNN with template learning on FPGA. / Köse, Erdem; Yalçın, Müştak E.
CNNA 2018 - 16th International Workshop on Cellular Nanoscale Networks and Their Applications. ed. / Akos Zarandy. IEEE Computer Society, 2018. p. 103 (International Workshop on Cellular Nanoscale Networks and their Applications; Hac. 2018-August).

Araştırma sonucu: Kitap/Rapor/Konferans Bildirisinde Bölüm › Konferans katkısı › bilirkişi

TY - GEN

T1 - A new architecture for emulating CNN with template learning on FPGA

AU - Köse, Erdem

AU - Yalçın, Müştak E.

PY - 2018

Y1 - 2018

N2 - —Cellular Neural Network with time invariant weights is being used in computer vision applications. There are many ways to implement CNNs for real time image processing. VLSI and FPGA technologies are getting better day by day. In our study we improved our previous system-on-chip implementation of CNNs. Improved CNN system-on-chip processor is built on an improved CNN emulator design and a better processor core which performs a new template learning algorithm is shown. SoC is programmed to perform a sequential CNN operations on different input and state images with different templates which are now can be stored in DDR2 RAM. Upgraded system design allows that templates can be more dynamically updated by the new learning algoritm in run time. System is implemented on Spartan 6 FPGA and tests results are presented and compared.

AB - —Cellular Neural Network with time invariant weights is being used in computer vision applications. There are many ways to implement CNNs for real time image processing. VLSI and FPGA technologies are getting better day by day. In our study we improved our previous system-on-chip implementation of CNNs. Improved CNN system-on-chip processor is built on an improved CNN emulator design and a better processor core which performs a new template learning algorithm is shown. SoC is programmed to perform a sequential CNN operations on different input and state images with different templates which are now can be stored in DDR2 RAM. Upgraded system design allows that templates can be more dynamically updated by the new learning algoritm in run time. System is implemented on Spartan 6 FPGA and tests results are presented and compared.

UR - https://www.scopus.com/pages/publications/85064893866

M3 - Conference contribution

AN - SCOPUS:85064893866

T3 - International Workshop on Cellular Nanoscale Networks and their Applications

SP - 103

BT - CNNA 2018 - 16th International Workshop on Cellular Nanoscale Networks and Their Applications

A2 - Zarandy, Akos

PB - IEEE Computer Society

T2 - 16th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2018

Y2 - 28 August 2018 through 30 August 2018

ER -

A new architecture for emulating CNN with template learning on FPGA

Özet

Yayın serisi

???event.eventtypes.event.conference???

Bibliyografik not

Finansman

Diğer Dosyalar ve Linkler

Parmak izi

Alıntı Yap