A high linearity LNA using 180 nm CMOS technology for S-Band

Alican Caglar; Mustafa Berke Yelten

doi:10.1109/ECCTD.2017.8093230

A high linearity LNA using 180 nm CMOS technology for S-Band

Alican Caglar, Mustafa Berke Yelten

Elektronik ve Hab.Müh.Bölümü

Istanbul Technical University

Araştırma sonucu: ???type-name??? › Konferans katkısı › bilirkişi

7 Atıf (Scopus)

Özet

In this paper, a single-stage cascode low noise amplifier (LNA) was designed using UMC 180 nm complementary metal oxide semiconductor (CMOS) technology for 2.025-2.12 GHz (S-Band), specifically aimed for cryogenic applications. All transistor gates have electrostatic discharge (ESD) protection. The LNA achieved 15.8 dB gain, +2 dBm IIP3, and 1.6 dB noise figure (NF) at 2.075 GHz drawing 7.66 mA current from a 1.8 V supply. With regard to its counterparts, the LNA performs better in terms of its IIP3 outcome.

Orijinal dil	İngilizce
Ana bilgisayar yayını başlığı	2017 European Conference on Circuit Theory and Design, ECCTD 2017
Yayınlayan	Institute of Electrical and Electronics Engineers Inc.
ISBN (Elektronik)	9781538639740
DOI'lar	https://doi.org/10.1109/ECCTD.2017.8093230
Yayın durumu	Yayınlandı - 31 Eki 2017
Etkinlik	2017 European Conference on Circuit Theory and Design, ECCTD 2017 - Catania, Italy Süre: 4 Eyl 2017 → 6 Eyl 2017

Yayın serisi

Adı	2017 European Conference on Circuit Theory and Design, ECCTD 2017

???event.eventtypes.event.conference???

???event.eventtypes.event.conference???	2017 European Conference on Circuit Theory and Design, ECCTD 2017
Ülke/Bölge	Italy
Şehir	Catania
Periyot	4/09/17 → 6/09/17

Bibliyografik not

Publisher Copyright:
© 2017 IEEE.

Finansman

This work was sponsored by the Technological Research Council of Turkey under the project TÜBİTAK 1001 215E080 and Istanbul Technical University Department of Scientific Research Projects under the project 39465.

Finansörler	Finansör numarası
Istanbul Technical University Department of Scientific Research Projects	39465
Technological Research Council of Turkey	1001 215E080

Belgeye Erişim

10.1109/ECCTD.2017.8093230

Diğer Dosyalar ve Linkler

Link to publication in Scopus

Alıntı Yap

@inproceedings{4d0e3ceb09944062b025d0e8375b3260,

title = "A high linearity LNA using 180 nm CMOS technology for S-Band",

abstract = "In this paper, a single-stage cascode low noise amplifier (LNA) was designed using UMC 180 nm complementary metal oxide semiconductor (CMOS) technology for 2.025-2.12 GHz (S-Band), specifically aimed for cryogenic applications. All transistor gates have electrostatic discharge (ESD) protection. The LNA achieved 15.8 dB gain, +2 dBm IIP3, and 1.6 dB noise figure (NF) at 2.075 GHz drawing 7.66 mA current from a 1.8 V supply. With regard to its counterparts, the LNA performs better in terms of its IIP3 outcome.",

keywords = "complementary metal oxide semiconductor (CMOS), cryogenic, electrostatic discharge (ESD), Low noise amplifier (LNA)",

author = "Alican Caglar and {Berke Yelten}, Mustafa",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 2017 European Conference on Circuit Theory and Design, ECCTD 2017 ; Conference date: 04-09-2017 Through 06-09-2017",

year = "2017",

month = oct,

day = "31",

doi = "10.1109/ECCTD.2017.8093230",

language = "English",

series = "2017 European Conference on Circuit Theory and Design, ECCTD 2017",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2017 European Conference on Circuit Theory and Design, ECCTD 2017",

address = "United States",

}

Caglar, A & Berke Yelten, M 2017, A high linearity LNA using 180 nm CMOS technology for S-Band. in 2017 European Conference on Circuit Theory and Design, ECCTD 2017., 8093230, 2017 European Conference on Circuit Theory and Design, ECCTD 2017, Institute of Electrical and Electronics Engineers Inc., 2017 European Conference on Circuit Theory and Design, ECCTD 2017, Catania, Italy, 4/09/17. https://doi.org/10.1109/ECCTD.2017.8093230

A high linearity LNA using 180 nm CMOS technology for S-Band. / Caglar, Alican; Berke Yelten, Mustafa.
2017 European Conference on Circuit Theory and Design, ECCTD 2017. Institute of Electrical and Electronics Engineers Inc., 2017. 8093230 (2017 European Conference on Circuit Theory and Design, ECCTD 2017).

Araştırma sonucu: ???type-name??? › Konferans katkısı › bilirkişi

TY - GEN

T1 - A high linearity LNA using 180 nm CMOS technology for S-Band

AU - Caglar, Alican

AU - Berke Yelten, Mustafa

PY - 2017/10/31

Y1 - 2017/10/31

N2 - In this paper, a single-stage cascode low noise amplifier (LNA) was designed using UMC 180 nm complementary metal oxide semiconductor (CMOS) technology for 2.025-2.12 GHz (S-Band), specifically aimed for cryogenic applications. All transistor gates have electrostatic discharge (ESD) protection. The LNA achieved 15.8 dB gain, +2 dBm IIP3, and 1.6 dB noise figure (NF) at 2.075 GHz drawing 7.66 mA current from a 1.8 V supply. With regard to its counterparts, the LNA performs better in terms of its IIP3 outcome.

AB - In this paper, a single-stage cascode low noise amplifier (LNA) was designed using UMC 180 nm complementary metal oxide semiconductor (CMOS) technology for 2.025-2.12 GHz (S-Band), specifically aimed for cryogenic applications. All transistor gates have electrostatic discharge (ESD) protection. The LNA achieved 15.8 dB gain, +2 dBm IIP3, and 1.6 dB noise figure (NF) at 2.075 GHz drawing 7.66 mA current from a 1.8 V supply. With regard to its counterparts, the LNA performs better in terms of its IIP3 outcome.

KW - complementary metal oxide semiconductor (CMOS)

KW - cryogenic

KW - electrostatic discharge (ESD)

KW - Low noise amplifier (LNA)

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U2 - 10.1109/ECCTD.2017.8093230

DO - 10.1109/ECCTD.2017.8093230

M3 - Conference contribution

AN - SCOPUS:85039900827

T3 - 2017 European Conference on Circuit Theory and Design, ECCTD 2017

BT - 2017 European Conference on Circuit Theory and Design, ECCTD 2017

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2017 European Conference on Circuit Theory and Design, ECCTD 2017

Y2 - 4 September 2017 through 6 September 2017

ER -

A high linearity LNA using 180 nm CMOS technology for S-Band

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Finansman

Belgeye Erişim

Diğer Dosyalar ve Linkler

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