A Hardware Accelerator Design for Quaternion to Euler Angles Conversion

Serkan Şenel*, Ramazan Yençeri

*Bu çalışma için yazışmadan sorumlu yazar

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Özet

This paper describes a hardware accelerator design for converting quaternion to Euler angles using High Level Synthesis methodology. As a design methodology, automatic code generation from Simulink model, prototyping device, number representation, formulation, basic operators and basic functions are explained. A successful implementation is presented by giving validation and synthesis results.

Orijinal dilİngilizce
Ana bilgisayar yayını başlığıICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems
Ana bilgisayar yayını alt yazısıTechnosapiens for Saving Humanity
YayınlayanInstitute of Electrical and Electronics Engineers Inc.
ISBN (Elektronik)9798350326499
DOI'lar
Yayın durumuYayınlandı - 2023
Etkinlik30th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2023 - Istanbul, Turkey
Süre: 4 Ara 20237 Ara 2023

Yayın serisi

AdıICECS 2023 - 2023 30th IEEE International Conference on Electronics, Circuits and Systems: Technosapiens for Saving Humanity

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???event.eventtypes.event.conference???30th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2023
Ülke/BölgeTurkey
ŞehirIstanbul
Periyot4/12/237/12/23

Bibliyografik not

Publisher Copyright:
© 2023 IEEE.

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