Systematic synthesis of approximate adders and multipliers with accurate error calculations

Mohammadreza Esmali Nojehdeh*, Mustafa Altun

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

13 Citations (Scopus)

Abstract

In this study, we perform logic synthesis and area optimization of approximate ripple-carry adders and Wallace-tree multipliers with a given error constraint. We first implement approximate 1-bit adders having different error rates as building blocks of the proposed multi-bit adders and multipliers. In implementations, we exploit offsetting errors in carry and sum outputs of the adders. Also we take into account the probability of occurrence of input assignments. Using the implemented 1-bit adders, we systematically synthesize multi-bit adders and multipliers proceeding from the least to the most significant bits. We design the ripple-carry adders such that their successive 1-bit approximate adders cannot produce build-up errors. We design the Wallace-tree multipliers by considering the fact that their building blocks of 1-bit adders might have different probabilities of occurrence for different input assignments. As a result, the proposed adders and multipliers, implemented using the Cadence Genus tool with TSMC 0.18μ m CMOS technology, offer in average a 25% smaller circuit area, and correspondingly power consumption, compared to the circuits proposed in the literature by satisfying the same error constraint. We also evaluate the adders and multipliers in image processing applications as well as within artificial neural networks.

Original languageEnglish
Pages (from-to)99-107
Number of pages9
JournalIntegration
Volume70
DOIs
Publication statusPublished - Jan 2020

Bibliographical note

Publisher Copyright:
© 2019 Elsevier B.V.

Funding

This work is supported by the TUBITAK-1001 project #117E078. This work is supported by the TUBITAK-1001 project #117E078.

FundersFunder number
TUBITAK-1001117E078

    Keywords

    • Approximate computing
    • Circuit design
    • Logic synthesis
    • Neural network
    • Ripple-carry adder
    • Wallace-tree multiplier

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