Serial multiplier architectures over GF2n for elliptic curve cryptosystems

Lejla Batina; Nele Mentens; Siddika Berna Örs; Bart Preneel

Serial multiplier architectures over GF2ⁿ for elliptic curve cryptosystems

Lejla Batina^*, Nele Mentens, Siddika Berna Örs, Bart Preneel

^*Corresponding author for this work

KU Leuven

Research output: Contribution to conference › Paper › peer-review

15 Citations (Scopus)

Abstract

We present an FPGA implementation of a new multiplier for binary finite fields that combines two previously known methods. The multiplier is designed for polynomial bases which allow more flexibility in hardware and is dedicated to efficient implementations of elliptic curve cryptography. An extension to a digit-serial architecture is also sketched. For the introduced architecture we also discuss resistance to side-channel attacks.

Original language	English
Pages	779-782
Number of pages	4
Publication status	Published - 2004
Externally published	Yes
Event	Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference, MELECON 2004 - Dubrovnik, Croatia Duration: 12 May 2004 → 15 May 2004

Conference

Conference	Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference, MELECON 2004
Country/Territory	Croatia
City	Dubrovnik
Period	12/05/04 → 15/05/04

Cite this

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title = "Serial multiplier architectures over GF2n for elliptic curve cryptosystems",

abstract = "We present an FPGA implementation of a new multiplier for binary finite fields that combines two previously known methods. The multiplier is designed for polynomial bases which allow more flexibility in hardware and is dedicated to efficient implementations of elliptic curve cryptography. An extension to a digit-serial architecture is also sketched. For the introduced architecture we also discuss resistance to side-channel attacks.",

author = "Lejla Batina and Nele Mentens and {\"O}rs, {Siddika Berna} and Bart Preneel",

year = "2004",

language = "English",

pages = "779--782",

note = "Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference, MELECON 2004 ; Conference date: 12-05-2004 Through 15-05-2004",

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T1 - Serial multiplier architectures over GF2n for elliptic curve cryptosystems

AU - Batina, Lejla

AU - Mentens, Nele

AU - Örs, Siddika Berna

AU - Preneel, Bart

PY - 2004

Y1 - 2004

N2 - We present an FPGA implementation of a new multiplier for binary finite fields that combines two previously known methods. The multiplier is designed for polynomial bases which allow more flexibility in hardware and is dedicated to efficient implementations of elliptic curve cryptography. An extension to a digit-serial architecture is also sketched. For the introduced architecture we also discuss resistance to side-channel attacks.

AB - We present an FPGA implementation of a new multiplier for binary finite fields that combines two previously known methods. The multiplier is designed for polynomial bases which allow more flexibility in hardware and is dedicated to efficient implementations of elliptic curve cryptography. An extension to a digit-serial architecture is also sketched. For the introduced architecture we also discuss resistance to side-channel attacks.

UR - http://www.scopus.com/inward/record.url?scp=8744300677&partnerID=8YFLogxK

M3 - Paper

AN - SCOPUS:8744300677

SP - 779

EP - 782

T2 - Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference, MELECON 2004

Y2 - 12 May 2004 through 15 May 2004

ER -

Serial multiplier architectures over GF2ⁿ for elliptic curve cryptosystems

Abstract

Conference

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