RISC-V İşlemcisi Üzerinde Özel Komutlar ve LLVM Entegrasyonu ile SPHINCS+ PQC Algoritmasının Optimizasyonu

Mert Paşa Çukur; Ece Olcay Güneş

doi:10.1109/SIU61531.2024.10600793

RISC-V İşlemcisi Üzerinde Özel Komutlar ve LLVM Entegrasyonu ile SPHINCS+ PQC Algoritmasının Optimizasyonu

Translated title of the contribution: Optimization of the SPHINCS+ PQC Algorithm with Custom Instructions and LLVM Integration on a RISC-V Processor

Mert Paşa Çukur, Ece Olcay Güneş

Department of Electronics and Communication Engineering

Istanbul Technical University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

With the emergence of quantum computers, traditional open key cryptographic schemes have faced an existential threat that necessitates the development of quantum resistant algorithms. Post Quantum Cryptography (PQC) has emerged as a solution that opposes this new cryptoanalytic evolution with hash based signature schemes such as SPHINCS+, known as one of the leading candidates by NIST. However, SPHINCS+ requires hardware acceleration for practical use. This study offers a method to accelerate the SPHINCS+ algorithm running in the RISC-V processor on the FPGA using the LLVM integration for custom instruction extension. Custom instructions have been developed for the SHA-256 operations, a fundamental component of SPHINCS+, resulting in a 5.09x acceleration of the algorithm.

Translated title of the contribution	Optimization of the SPHINCS+ PQC Algorithm with Custom Instructions and LLVM Integration on a RISC-V Processor
Original language	Turkish
Title of host publication	32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9798350388961
DOIs	https://doi.org/10.1109/SIU61531.2024.10600793
Publication status	Published - 2024
Event	32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Mersin, Turkey Duration: 15 May 2024 → 18 May 2024

Publication series

Name	32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings

Conference

Conference	32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024
Country/Territory	Turkey
City	Mersin
Period	15/05/24 → 18/05/24

Bibliographical note

Publisher Copyright:
© 2024 IEEE.

Access to Document

10.1109/SIU61531.2024.10600793

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Çukur, M. P., & Güneş, E. O. (2024). RISC-V İşlemcisi Üzerinde Özel Komutlar ve LLVM Entegrasyonu ile SPHINCS+ PQC Algoritmasının Optimizasyonu. In 32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings (32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SIU61531.2024.10600793

Çukur, Mert Paşa ; Güneş, Ece Olcay. / RISC-V İşlemcisi Üzerinde Özel Komutlar ve LLVM Entegrasyonu ile SPHINCS+ PQC Algoritmasının Optimizasyonu. 32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2024. (32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings).

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abstract = "With the emergence of quantum computers, traditional open key cryptographic schemes have faced an existential threat that necessitates the development of quantum resistant algorithms. Post Quantum Cryptography (PQC) has emerged as a solution that opposes this new cryptoanalytic evolution with hash based signature schemes such as SPHINCS+, known as one of the leading candidates by NIST. However, SPHINCS+ requires hardware acceleration for practical use. This study offers a method to accelerate the SPHINCS+ algorithm running in the RISC-V processor on the FPGA using the LLVM integration for custom instruction extension. Custom instructions have been developed for the SHA-256 operations, a fundamental component of SPHINCS+, resulting in a 5.09x acceleration of the algorithm.",

keywords = "LLVM, Post Quantum Cryptography (PQC), RISC-V, SHA-256 optimization, SPHINCS+, custom instructions, hardware acceleration, vector instructions",

author = "{\c C}ukur, {Mert Pa{\c s}a} and G{\"u}ne{\c s}, {Ece Olcay}",

note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 ; Conference date: 15-05-2024 Through 18-05-2024",

year = "2024",

doi = "10.1109/SIU61531.2024.10600793",

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series = "32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings",

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Çukur, MP & Güneş, EO 2024, RISC-V İşlemcisi Üzerinde Özel Komutlar ve LLVM Entegrasyonu ile SPHINCS+ PQC Algoritmasının Optimizasyonu. in 32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings. 32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024, Mersin, Turkey, 15/05/24. https://doi.org/10.1109/SIU61531.2024.10600793

RISC-V İşlemcisi Üzerinde Özel Komutlar ve LLVM Entegrasyonu ile SPHINCS+ PQC Algoritmasının Optimizasyonu. / Çukur, Mert Paşa; Güneş, Ece Olcay.
32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2024. (32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Güneş, Ece Olcay

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AB - With the emergence of quantum computers, traditional open key cryptographic schemes have faced an existential threat that necessitates the development of quantum resistant algorithms. Post Quantum Cryptography (PQC) has emerged as a solution that opposes this new cryptoanalytic evolution with hash based signature schemes such as SPHINCS+, known as one of the leading candidates by NIST. However, SPHINCS+ requires hardware acceleration for practical use. This study offers a method to accelerate the SPHINCS+ algorithm running in the RISC-V processor on the FPGA using the LLVM integration for custom instruction extension. Custom instructions have been developed for the SHA-256 operations, a fundamental component of SPHINCS+, resulting in a 5.09x acceleration of the algorithm.

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Çukur MP, Güneş EO. RISC-V İşlemcisi Üzerinde Özel Komutlar ve LLVM Entegrasyonu ile SPHINCS+ PQC Algoritmasının Optimizasyonu. In 32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2024. (32nd IEEE Conference on Signal Processing and Communications Applications, SIU 2024 - Proceedings). doi: 10.1109/SIU61531.2024.10600793

RISC-V İşlemcisi Üzerinde Özel Komutlar ve LLVM Entegrasyonu ile SPHINCS+ PQC Algoritmasının Optimizasyonu

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