Review: Analog design methodologies for reliability in nanoscale CMOS circuits

Engin Afacan; Mustafa Berke Yelten; Gunhan Dundar

doi:10.1109/SMACD.2017.7981608

Review: Analog design methodologies for reliability in nanoscale CMOS circuits

Engin Afacan
, Mustafa Berke Yelten
, Gunhan Dundar

Department of Electronics and Communication Engineering

Bogazici University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

23 Citations (Scopus)

Abstract

In modern CMOS technology, local electrical stress has substantially increased as device geometries scaled down more aggressively compared to supply voltages. As a result, time-dependent degradation mechanisms (aging phenomena) became an important performance problem, which leads to a considerable lifetime reduction in manufactured integrated circuits. Combination of these aging phenomena with process variations has made reliability a major design objective. In analog circuits, different approaches have been proposed to mitigate the performance challenges related to device reliability. This paper discusses aging in CMOS technology and reviews reliability-aware analog circuit design methodologies for nanoscale circuits.

Original language	English
Title of host publication	SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781509050529
DOIs	https://doi.org/10.1109/SMACD.2017.7981608
Publication status	Published - 14 Jul 2017
Event	14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017 - Giardini Naxos, Taormina, Italy Duration: 12 Jun 2017 → 15 Jun 2017

Publication series

Name	SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design

Conference

Conference	14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017
Country/Territory	Italy
City	Giardini Naxos, Taormina
Period	12/06/17 → 15/06/17

Bibliographical note

Publisher Copyright:
© 2017 IEEE.

Access to Document

10.1109/SMACD.2017.7981608

Cite this

Afacan, E., Berke Yelten, M., & Dundar, G. (2017). Review: Analog design methodologies for reliability in nanoscale CMOS circuits. In SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design Article 7981608 (SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SMACD.2017.7981608

Afacan, Engin ; Berke Yelten, Mustafa ; Dundar, Gunhan. / Review : Analog design methodologies for reliability in nanoscale CMOS circuits. SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Institute of Electrical and Electronics Engineers Inc., 2017. (SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design).

@inproceedings{726f83a46ce4478bb345df945b09da81,

title = "Review: Analog design methodologies for reliability in nanoscale CMOS circuits",

abstract = "In modern CMOS technology, local electrical stress has substantially increased as device geometries scaled down more aggressively compared to supply voltages. As a result, time-dependent degradation mechanisms (aging phenomena) became an important performance problem, which leads to a considerable lifetime reduction in manufactured integrated circuits. Combination of these aging phenomena with process variations has made reliability a major design objective. In analog circuits, different approaches have been proposed to mitigate the performance challenges related to device reliability. This paper discusses aging in CMOS technology and reviews reliability-aware analog circuit design methodologies for nanoscale circuits.",

author = "Engin Afacan and \{Berke Yelten\}, Mustafa and Gunhan Dundar",

note = "Publisher Copyright: {\textcopyright} 2017 IEEE.; 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017 ; Conference date: 12-06-2017 Through 15-06-2017",

year = "2017",

month = jul,

day = "14",

doi = "10.1109/SMACD.2017.7981608",

language = "English",

series = "SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design",

address = "United States",

}

Afacan, E, Berke Yelten, M & Dundar, G 2017, Review: Analog design methodologies for reliability in nanoscale CMOS circuits. in SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design., 7981608, SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Institute of Electrical and Electronics Engineers Inc., 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017, Giardini Naxos, Taormina, Italy, 12/06/17. https://doi.org/10.1109/SMACD.2017.7981608

Review: Analog design methodologies for reliability in nanoscale CMOS circuits. / Afacan, Engin; Berke Yelten, Mustafa; Dundar, Gunhan.
SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Institute of Electrical and Electronics Engineers Inc., 2017. 7981608 (SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Review

T2 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2017

AU - Afacan, Engin

AU - Berke Yelten, Mustafa

AU - Dundar, Gunhan

PY - 2017/7/14

Y1 - 2017/7/14

N2 - In modern CMOS technology, local electrical stress has substantially increased as device geometries scaled down more aggressively compared to supply voltages. As a result, time-dependent degradation mechanisms (aging phenomena) became an important performance problem, which leads to a considerable lifetime reduction in manufactured integrated circuits. Combination of these aging phenomena with process variations has made reliability a major design objective. In analog circuits, different approaches have been proposed to mitigate the performance challenges related to device reliability. This paper discusses aging in CMOS technology and reviews reliability-aware analog circuit design methodologies for nanoscale circuits.

AB - In modern CMOS technology, local electrical stress has substantially increased as device geometries scaled down more aggressively compared to supply voltages. As a result, time-dependent degradation mechanisms (aging phenomena) became an important performance problem, which leads to a considerable lifetime reduction in manufactured integrated circuits. Combination of these aging phenomena with process variations has made reliability a major design objective. In analog circuits, different approaches have been proposed to mitigate the performance challenges related to device reliability. This paper discusses aging in CMOS technology and reviews reliability-aware analog circuit design methodologies for nanoscale circuits.

UR - https://www.scopus.com/pages/publications/85027513059

U2 - 10.1109/SMACD.2017.7981608

DO - 10.1109/SMACD.2017.7981608

M3 - Conference contribution

AN - SCOPUS:85027513059

T3 - SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design

BT - SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 12 June 2017 through 15 June 2017

ER -

Afacan E, Berke Yelten M, Dundar G. Review: Analog design methodologies for reliability in nanoscale CMOS circuits. In SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design. Institute of Electrical and Electronics Engineers Inc. 2017. 7981608. (SMACD 2017 - 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design). doi: 10.1109/SMACD.2017.7981608

Review: Analog design methodologies for reliability in nanoscale CMOS circuits

Abstract

Publication series

Conference

Bibliographical note

Access to Document

Other files and links

Fingerprint

Cite this