Reconvergent Path-aware Simulation of Bit-stream Processing

Sercan Aygun, M. Hassan Najafi, Mohsen Imani, Ece Olcay Gunes

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Few studies have explored the complex circuit simulation of stochastic and unary computing systems, which are referred to under the umbrella term of bit-stream processing. The computer simulation of multi-level cascaded circuits with reconvergent paths has not been largely examined in the context of bit-stream processing systems. This study addresses this gap and proposes a contingency table -based reconvergent path-aware simulation method for fast and efficient simulation of multi-level circuits. The proposed method exhibits significantly better runtime and accuracy.

Original languageEnglish
Title of host publicationGLSVLSI 2023 - Proceedings of the Great Lakes Symposium on VLSI 2023
PublisherAssociation for Computing Machinery
Pages225-226
Number of pages2
ISBN (Electronic)9798400701252
DOIs
Publication statusPublished - 5 Jun 2023
Event33rd Great Lakes Symposium on VLSI, GLSVLSI 2023 - Knoxville, United States
Duration: 5 Jun 20237 Jun 2023

Publication series

NameProceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Conference

Conference33rd Great Lakes Symposium on VLSI, GLSVLSI 2023
Country/TerritoryUnited States
CityKnoxville
Period5/06/237/06/23

Bibliographical note

Publisher Copyright:
© 2023 Owner/Author.

Keywords

  • bit-stream processing
  • reconvergence
  • simulation

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