Abstract
Few studies have explored the complex circuit simulation of stochastic and unary computing systems, which are referred to under the umbrella term of bit-stream processing. The computer simulation of multi-level cascaded circuits with reconvergent paths has not been largely examined in the context of bit-stream processing systems. This study addresses this gap and proposes a contingency table -based reconvergent path-aware simulation method for fast and efficient simulation of multi-level circuits. The proposed method exhibits significantly better runtime and accuracy.
Original language | English |
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Title of host publication | GLSVLSI 2023 - Proceedings of the Great Lakes Symposium on VLSI 2023 |
Publisher | Association for Computing Machinery |
Pages | 225-226 |
Number of pages | 2 |
ISBN (Electronic) | 9798400701252 |
DOIs | |
Publication status | Published - 5 Jun 2023 |
Event | 33rd Great Lakes Symposium on VLSI, GLSVLSI 2023 - Knoxville, United States Duration: 5 Jun 2023 → 7 Jun 2023 |
Publication series
Name | Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI |
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Conference
Conference | 33rd Great Lakes Symposium on VLSI, GLSVLSI 2023 |
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Country/Territory | United States |
City | Knoxville |
Period | 5/06/23 → 7/06/23 |
Bibliographical note
Publisher Copyright:© 2023 Owner/Author.
Keywords
- bit-stream processing
- reconvergence
- simulation