Realization of processing blocks of CNN based CASA system on CPU and FPGA

O. Levent Şavkay; Evren Cesur; Nerhun Yildiz; Müştak E. Yalcin; Vedat Tavşanoǧlu

doi:10.1109/ISCAS.2014.6865576

Realization of processing blocks of CNN based CASA system on CPU and FPGA

O. Levent Şavkay, Evren Cesur, Nerhun Yildiz, Müştak E. Yalcin, Vedat Tavşanoǧlu

Department of Electronics and Communication Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Citations (Scopus)

Abstract

In this paper, hardware optimization of the preprocessing and software implementation of the processing blocks of a computer-aided semen analysis (CASA) system are proposed, which is also implemented on an FPGA and ARM device as a working prototype. The software implementation of the track initialization, track maintenance, data validation and classification blocks of the processing part are implemented on a Zynq7000 ARM Cortex-A9 processor. In the preprocessing part, a real-time cellular neural network (CNN) emulator (RTCNNP-v2) is used for the realization of the image processing algorithms, whose regular, flexible and reconfigurable infrastructure simplifies the prototyping process. The CASA system introduced in this paper is capable of processing full-HD 1080p@60 (1080 × 1920) video images in real-time.

Original language	English
Title of host publication	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	2081-2084
Number of pages	4
ISBN (Print)	9781479934324
DOIs	https://doi.org/10.1109/ISCAS.2014.6865576
Publication status	Published - 2014
Event	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 - Melbourne, VIC, Australia Duration: 1 Jun 2014 → 5 Jun 2014

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Conference

Conference	2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
Country/Territory	Australia
City	Melbourne, VIC
Period	1/06/14 → 5/06/14

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10.1109/ISCAS.2014.6865576

Cite this

Şavkay, O. L., Cesur, E., Yildiz, N., Yalcin, M. E., & Tavşanoǧlu, V. (2014). Realization of processing blocks of CNN based CASA system on CPU and FPGA. In 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 (pp. 2081-2084). Article 6865576 (Proceedings - IEEE International Symposium on Circuits and Systems). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.2014.6865576

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Şavkay, OL, Cesur, E, Yildiz, N, Yalcin, ME & Tavşanoǧlu, V 2014, Realization of processing blocks of CNN based CASA system on CPU and FPGA. in 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014., 6865576, Proceedings - IEEE International Symposium on Circuits and Systems, Institute of Electrical and Electronics Engineers Inc., pp. 2081-2084, 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014, Melbourne, VIC, Australia, 1/06/14. https://doi.org/10.1109/ISCAS.2014.6865576

Realization of processing blocks of CNN based CASA system on CPU and FPGA. / Şavkay, O. Levent; Cesur, Evren; Yildiz, Nerhun et al.
2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. p. 2081-2084 6865576 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - In this paper, hardware optimization of the preprocessing and software implementation of the processing blocks of a computer-aided semen analysis (CASA) system are proposed, which is also implemented on an FPGA and ARM device as a working prototype. The software implementation of the track initialization, track maintenance, data validation and classification blocks of the processing part are implemented on a Zynq7000 ARM Cortex-A9 processor. In the preprocessing part, a real-time cellular neural network (CNN) emulator (RTCNNP-v2) is used for the realization of the image processing algorithms, whose regular, flexible and reconfigurable infrastructure simplifies the prototyping process. The CASA system introduced in this paper is capable of processing full-HD 1080p@60 (1080 × 1920) video images in real-time.

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Şavkay OL, Cesur E, Yildiz N, Yalcin ME, Tavşanoǧlu V. Realization of processing blocks of CNN based CASA system on CPU and FPGA. In 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc. 2014. p. 2081-2084. 6865576. (Proceedings - IEEE International Symposium on Circuits and Systems). doi: 10.1109/ISCAS.2014.6865576

Realization of processing blocks of CNN based CASA system on CPU and FPGA

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