Power/area analysis and optimization of a DS-SS receiver for an integrated sensor microsystem

N. Aydin, T. Arslan, D. R.S. Cumming

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

Communication systems targeting miniaturized sensor microsystem networks are characterized by their restricted power and area constraints. When considering the design of telecommunication system for such a network, the receiver is the key performance critical block. This paper describes research work carried out on studying the impact of input data characteristics and resolution and internal data path complexity on area and power performance of the receiver. We have constructed a number of transmitter/receiver architectures and analyzed their power/area. We demonstrate that up to 59[%] and 11[%] savings in area and power respectively could be achieved by optimizing input data size and internal register width for a particular application while maintaining signal quality.

Original languageEnglish
Title of host publicationProceedings - Euromicro Symposium on Digital System Design, DSD 2003
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages402-406
Number of pages5
ISBN (Electronic)0769520030, 9780769520032
DOIs
Publication statusPublished - 2003
Externally publishedYes
EventEuromicro Symposium on Digital System Design, DSD 2003 - Belek-Antalya, Turkey
Duration: 1 Sept 20036 Sept 2003

Publication series

NameProceedings - Euromicro Symposium on Digital System Design, DSD 2003

Conference

ConferenceEuromicro Symposium on Digital System Design, DSD 2003
Country/TerritoryTurkey
CityBelek-Antalya
Period1/09/036/09/03

Bibliographical note

Publisher Copyright:
© 2003 IEEE.

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