Abstract
This paper compares several neural network algorithms using the digital predistortion (DPD) technique for high-efficiency power amplifiers. The neural networks estimate the coefficients of the memory polynomial digital predistortion technique by constructing an indirect learning architecture. The Doherty power amplifier input and output data extracted using a 100 MHz OFDM signal are used to build the DPD model. As the aim of the study, the memorial polynomial digital predistortion technique with several neural network algorithms is compared to observe linearity and linearizability performances on power amplifiers. An adjacent channel power ratio of-31.23 dB, an error vector magnitude of 5.74%, and a normalized mean square error (NMSE) of-36.46 dB have been obtained through the Long-Short-Term Memory algorithm, superior to its counterparts.
| Original language | English |
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| Title of host publication | Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9798350351927 |
| DOIs | |
| Publication status | Published - 2024 |
| Event | 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024 - Volos, Greece Duration: 2 Jul 2024 → 5 Jul 2024 |
Publication series
| Name | Proceedings - 2024 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024 |
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Conference
| Conference | 20th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2024 |
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| Country/Territory | Greece |
| City | Volos |
| Period | 2/07/24 → 5/07/24 |
Bibliographical note
Publisher Copyright:© 2024 IEEE.
Keywords
- Digital predistortion
- linearity
- memory polynomial
- neural network
- power amplifier