Nanoscale digital computation through percolation

Mustafa Altun*, Marc D. Riedel, Claudia Neuhauser

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Citations (Scopus)

Abstract

In this study, we apply a novel synthesis technique for implementing robust digital computation in nanoscale lattices with random interconnects: percolation theory on random graphs. We exploit the non-linearity that occurs through percolation to produce Boolean functionality. We show that the error margins, defined in terms of the steepness of the non-linearity, translate into the degree of defect tolerance. We study the problem of mapping Boolean functions onto lattices with good error margins.

Original languageEnglish
Title of host publication2009 46th ACM/IEEE Design Automation Conference, DAC 2009
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages615-616
Number of pages2
ISBN (Print)9781605584973
DOIs
Publication statusPublished - 2009
Externally publishedYes
Event2009 46th ACM/IEEE Design Automation Conference, DAC 2009 - San Francisco, CA, United States
Duration: 26 Jul 200931 Jul 2009

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Conference

Conference2009 46th ACM/IEEE Design Automation Conference, DAC 2009
Country/TerritoryUnited States
CitySan Francisco, CA
Period26/07/0931/07/09

Keywords

  • Logic synthesis
  • Nanoscale digital computation
  • Percolation

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