Abstract
In this paper, a design methodology that can be used to implement first-order MOS-only polyphase filter is proposed. The proposed MOS-only polyphase filter can be used as an image-reject filter in low-IF circuits where key filter parameters are electronically controllable. Moreover, the approach allows substantial reduction in the circuit's chip area by avoiding the use of bulky passive components. In order to verify the usefulness of the theoretical approach, simulation results of the filter are obtained by using SPECTRE in the CADENCE design tool.
| Original language | English |
|---|---|
| Title of host publication | 2017 10th International Conference on Electrical and Electronics Engineering, ELECO 2017 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 1226-1229 |
| Number of pages | 4 |
| ISBN (Electronic) | 9786050107371 |
| Publication status | Published - 2 Jul 2017 |
| Event | 10th International Conference on Electrical and Electronics Engineering, ELECO 2017 - Bursa, Turkey Duration: 29 Nov 2017 → 2 Dec 2017 |
Publication series
| Name | 2017 10th International Conference on Electrical and Electronics Engineering, ELECO 2017 |
|---|---|
| Volume | 2018-January |
Conference
| Conference | 10th International Conference on Electrical and Electronics Engineering, ELECO 2017 |
|---|---|
| Country/Territory | Turkey |
| City | Bursa |
| Period | 29/11/17 → 2/12/17 |
Bibliographical note
Publisher Copyright:© 2017 EMO (Turkish Chamber of Electrical Enginners).