MOS-only memcapacitor emulator circuit with experimental results

Hacer Atar Yildiz; Serdar Ozoguz

doi:10.1016/j.aeue.2025.155881

MOS-only memcapacitor emulator circuit with experimental results

Hacer Atar Yildiz^*, Serdar Ozoguz

^*Corresponding author for this work

Department of Electronics and Communication Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

In this study, it is presented a straightforward memcapacitor emulator circuit that uses MOS components only. Our proposed circuit uses MOSFETs’ built-in capacitors rather than bulky passive components, which significantly reduces the impact on the IC environment. The simulation results, obtained using the 0.18 µm CMOS technology in Cadence, confirm the validity of the theoretical analysis and a possible use of the suggested emulator in a popular two-input logic gate is also presented. Furthermore, experimental validation is used to verify the circuit's viability.

Original language	English
Article number	155881
Journal	AEU - International Journal of Electronics and Communications
Volume	200
DOIs	https://doi.org/10.1016/j.aeue.2025.155881
Publication status	Published - Oct 2025

Bibliographical note

Publisher Copyright:
© 2025 Elsevier GmbH

Keywords

Electrically tunable circuit
Features of hysteresis
MOS-only memcapacitor circuit

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10.1016/j.aeue.2025.155881

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@article{4c70caf5172b47849352f2707464c03e,

title = "MOS-only memcapacitor emulator circuit with experimental results",

abstract = "In this study, it is presented a straightforward memcapacitor emulator circuit that uses MOS components only. Our proposed circuit uses MOSFETs{\textquoteright} built-in capacitors rather than bulky passive components, which significantly reduces the impact on the IC environment. The simulation results, obtained using the 0.18 µm CMOS technology in Cadence, confirm the validity of the theoretical analysis and a possible use of the suggested emulator in a popular two-input logic gate is also presented. Furthermore, experimental validation is used to verify the circuit's viability.",

keywords = "Electrically tunable circuit, Features of hysteresis, MOS-only memcapacitor circuit",

author = "Yildiz, \{Hacer Atar\} and Serdar Ozoguz",

note = "Publisher Copyright: {\textcopyright} 2025 Elsevier GmbH",

year = "2025",

month = oct,

doi = "10.1016/j.aeue.2025.155881",

language = "English",

volume = "200",

journal = "AEU - International Journal of Electronics and Communications",

issn = "1434-8411",

publisher = "Elsevier GmbH",

}

TY - JOUR

T1 - MOS-only memcapacitor emulator circuit with experimental results

AU - Yildiz, Hacer Atar

AU - Ozoguz, Serdar

PY - 2025/10

Y1 - 2025/10

N2 - In this study, it is presented a straightforward memcapacitor emulator circuit that uses MOS components only. Our proposed circuit uses MOSFETs’ built-in capacitors rather than bulky passive components, which significantly reduces the impact on the IC environment. The simulation results, obtained using the 0.18 µm CMOS technology in Cadence, confirm the validity of the theoretical analysis and a possible use of the suggested emulator in a popular two-input logic gate is also presented. Furthermore, experimental validation is used to verify the circuit's viability.

AB - In this study, it is presented a straightforward memcapacitor emulator circuit that uses MOS components only. Our proposed circuit uses MOSFETs’ built-in capacitors rather than bulky passive components, which significantly reduces the impact on the IC environment. The simulation results, obtained using the 0.18 µm CMOS technology in Cadence, confirm the validity of the theoretical analysis and a possible use of the suggested emulator in a popular two-input logic gate is also presented. Furthermore, experimental validation is used to verify the circuit's viability.

KW - Electrically tunable circuit

KW - Features of hysteresis

KW - MOS-only memcapacitor circuit

UR - https://www.scopus.com/pages/publications/105007532323

U2 - 10.1016/j.aeue.2025.155881

DO - 10.1016/j.aeue.2025.155881

M3 - Article

AN - SCOPUS:105007532323

SN - 1434-8411

VL - 200

JO - AEU - International Journal of Electronics and Communications

JF - AEU - International Journal of Electronics and Communications

M1 - 155881

ER -

MOS-only memcapacitor emulator circuit with experimental results

Abstract

Bibliographical note

Keywords

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