Modeling the Avalanche Breakdown of the FMMT417 NPN BJT in the TINA Environment

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1 Citation (Scopus)

Abstract

In this paper, the avalanche breakdown observed in avalanche-type bipolar junction transistors is modeled, where a macromodel proposed earlier in the literature is extended to become compatible with practical circuit simulators. Moreover, contributions to the macromodel are introduced and implemented. The resulting model is used in circuit simulations, and the outcomes are compared with the experimental results that depict the accuracy of the proposed approach.

Original languageEnglish
Title of host publicationProceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798350332650
DOIs
Publication statusPublished - 2023
Event19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023 - Funchal, Portugal
Duration: 3 Jul 20235 Jul 2023

Publication series

NameProceedings - 2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023

Conference

Conference19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuit Design, SMACD 2023
Country/TerritoryPortugal
CityFunchal
Period3/07/235/07/23

Bibliographical note

Publisher Copyright:
© 2023 IEEE.

Keywords

  • avalanche breakdown
  • Avalanche transistors
  • bipolar junction transistor
  • breakdown model
  • Marx generator

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