Abstract
This paper presents a modeling approach to simulate the impact of total ionizing dose (TID) degradation on low-power analog and mixed-signal circuits. The modeling approach has been performed on 180-nm n-type metal-oxide-semiconductor field-effect transistors (n-MOSFETs). The effects of the finger number, channel geometry, and biasing voltages have been tested during irradiation experiments. All Berkeley short-channel insulated gate field-effect transistor model (BSIM) parameters relevant to the transistor properties affected by TID have been modified in an algorithmic flow to correctly estimate the sub-threshold leakage current for a given dose level. The maximum error of the model developed is below 8%. A case study considering a five-stage ring oscillator is simulated with the generated model to show that the power consumption of the circuit increases and the oscillation frequency decreases around by 14%.
Original language | English |
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Article number | 8770267 |
Pages (from-to) | 4617-4622 |
Number of pages | 6 |
Journal | IEEE Transactions on Electron Devices |
Volume | 66 |
Issue number | 11 |
DOIs | |
Publication status | Published - Nov 2019 |
Bibliographical note
Publisher Copyright:© 1963-2012 IEEE.
Keywords
- Analog circuits
- radiation
- total ionization dose
- total ionizing dose (TID)
- transistor modeling