Implementation of a software defined FM mixed demodulator on FPGA

A. Oguz Kislal; Arda Demiray; Osman Ceylan; H. Bulent Yagci

doi:10.1109/TELFOR.2015.7377477

Implementation of a software defined FM mixed demodulator on FPGA

A. Oguz Kislal, Arda Demiray, Osman Ceylan, H. Bulent Yagci

Department of Electronics and Communication Engineering

Istanbul Technical University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

2 Citations (Scopus)

Abstract

Software defined radio (SDR) applications are usually preferred in low power flexible communication systems. In this paper, a software defined Frequency Modulation (FM) demodulator is presented. Mixed demodulation technique is used to build a digital FM demodulator which has 16 MHz sampling rate. Proposed system was implemented successfully on a Field Programmable Gate Array (FPGA). The system uses 1247 logic elements. FPGA's power consumption is 113.56 mW. The system was tested and verified with a test bed including Analog Digital Converter (ADC) and Digital Analog Converter (DAC).

Original language	English
Title of host publication	2015 23rd Telecommunications Forum, TELFOR 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	333-336
Number of pages	4
ISBN (Electronic)	9781509000548
DOIs	https://doi.org/10.1109/TELFOR.2015.7377477
Publication status	Published - 8 Jan 2016
Event	23rd Telecommunications Forum, TELFOR 2015 - Belgrade, Serbia Duration: 24 Nov 2015 → 26 Nov 2015

Publication series

Name	2015 23rd Telecommunications Forum, TELFOR 2015

Conference

Conference	23rd Telecommunications Forum, TELFOR 2015
Country/Territory	Serbia
City	Belgrade
Period	24/11/15 → 26/11/15

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

Keywords

CORDIC
Digital FM
FPGA
SDR

Access to Document

10.1109/TELFOR.2015.7377477

Cite this

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title = "Implementation of a software defined FM mixed demodulator on FPGA",

abstract = "Software defined radio (SDR) applications are usually preferred in low power flexible communication systems. In this paper, a software defined Frequency Modulation (FM) demodulator is presented. Mixed demodulation technique is used to build a digital FM demodulator which has 16 MHz sampling rate. Proposed system was implemented successfully on a Field Programmable Gate Array (FPGA). The system uses 1247 logic elements. FPGA's power consumption is 113.56 mW. The system was tested and verified with a test bed including Analog Digital Converter (ADC) and Digital Analog Converter (DAC).",

keywords = "CORDIC, Digital FM, FPGA, SDR",

author = "Kislal, {A. Oguz} and Arda Demiray and Osman Ceylan and Yagci, {H. Bulent}",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 23rd Telecommunications Forum, TELFOR 2015 ; Conference date: 24-11-2015 Through 26-11-2015",

year = "2016",

month = jan,

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doi = "10.1109/TELFOR.2015.7377477",

language = "English",

series = "2015 23rd Telecommunications Forum, TELFOR 2015",

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}

Kislal, AO, Demiray, A, Ceylan, O & Yagci, HB 2016, Implementation of a software defined FM mixed demodulator on FPGA. in 2015 23rd Telecommunications Forum, TELFOR 2015., 7377477, 2015 23rd Telecommunications Forum, TELFOR 2015, Institute of Electrical and Electronics Engineers Inc., pp. 333-336, 23rd Telecommunications Forum, TELFOR 2015, Belgrade, Serbia, 24/11/15. https://doi.org/10.1109/TELFOR.2015.7377477

Implementation of a software defined FM mixed demodulator on FPGA. / Kislal, A. Oguz; Demiray, Arda; Ceylan, Osman et al.
2015 23rd Telecommunications Forum, TELFOR 2015. Institute of Electrical and Electronics Engineers Inc., 2016. p. 333-336 7377477 (2015 23rd Telecommunications Forum, TELFOR 2015).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Implementation of a software defined FM mixed demodulator on FPGA

AU - Kislal, A. Oguz

AU - Demiray, Arda

AU - Ceylan, Osman

AU - Yagci, H. Bulent

PY - 2016/1/8

Y1 - 2016/1/8

N2 - Software defined radio (SDR) applications are usually preferred in low power flexible communication systems. In this paper, a software defined Frequency Modulation (FM) demodulator is presented. Mixed demodulation technique is used to build a digital FM demodulator which has 16 MHz sampling rate. Proposed system was implemented successfully on a Field Programmable Gate Array (FPGA). The system uses 1247 logic elements. FPGA's power consumption is 113.56 mW. The system was tested and verified with a test bed including Analog Digital Converter (ADC) and Digital Analog Converter (DAC).

AB - Software defined radio (SDR) applications are usually preferred in low power flexible communication systems. In this paper, a software defined Frequency Modulation (FM) demodulator is presented. Mixed demodulation technique is used to build a digital FM demodulator which has 16 MHz sampling rate. Proposed system was implemented successfully on a Field Programmable Gate Array (FPGA). The system uses 1247 logic elements. FPGA's power consumption is 113.56 mW. The system was tested and verified with a test bed including Analog Digital Converter (ADC) and Digital Analog Converter (DAC).

KW - CORDIC

KW - Digital FM

KW - FPGA

KW - SDR

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SP - 333

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BT - 2015 23rd Telecommunications Forum, TELFOR 2015

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 23rd Telecommunications Forum, TELFOR 2015

Y2 - 24 November 2015 through 26 November 2015

ER -

Implementation of a software defined FM mixed demodulator on FPGA

Abstract

Publication series

Conference

Bibliographical note

Keywords

Access to Document

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Cite this