Abstract
This paper is aimed to solve the problem of wideband optimum power transferring between low impedance current output high speed integrated circuits and standard 50 Ohm load. High amplitude current output circuits face some implementation obstacles, as an instance, in the TSMC 0.18 um CMOS process, in order to make the current carrying metal trace withstand to almost 80-120 mA, the trace should have characteristic impedance of about 6.25 Ohm, and consequently, the output should be terminated by a load having the same value as current carrying trace owns which leads to impedance mismatch. This paper presents on-chip and off-chip impedance matching networks to eliminate this obstacle. Two off-chip circuits (on 1mm FR4) and one integrated circuit are presented with design details and measurements. Matched system has shown almost sharp band-pass characteristics having a center frequency of 2.4 GHz with 800 MHz bandwidth.
Original language | English |
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Title of host publication | Conference Proceedings of 2015 2nd International Conference on Knowledge-Based Engineering and Innovation, KBEI 2015 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 66-70 |
Number of pages | 5 |
ISBN (Electronic) | 9781467365062 |
DOIs | |
Publication status | Published - 17 Mar 2016 |
Event | 2nd International Conference on Knowledge-Based Engineering and Innovation, KBEI 2015 - Tehran, Iran, Islamic Republic of Duration: 5 Nov 2015 → 6 Nov 2015 |
Publication series
Name | Conference Proceedings of 2015 2nd International Conference on Knowledge-Based Engineering and Innovation, KBEI 2015 |
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Conference
Conference | 2nd International Conference on Knowledge-Based Engineering and Innovation, KBEI 2015 |
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Country/Territory | Iran, Islamic Republic of |
City | Tehran |
Period | 5/11/15 → 6/11/15 |
Bibliographical note
Publisher Copyright:© 2015 IEEE.
Keywords
- Broadband impedance matching
- Chebyshev bandpass filters
- Co-simulation
- Distributed network synthesis
- Edge coupled bandpass filters
- High speed current output ICs
- Lumped network synthesis
- Nonlinear optimization