TY - JOUR
T1 - Hardware implementation of an elliptic curve processor over GF(p) with Montgomery modular multiplier
AU - Örs, Berna
AU - Batina, Lejla
AU - Preneel, Bart
AU - Vandewalle, Joos
PY - 2008
Y1 - 2008
N2 - This paper describes a hardware implementation of an arithmetic processor which is efficient for bit-lengths suitable for both commonly used types of Public Key Cryptography, i.e., Elliptic Curve (EC) and RSA Cryptosystems. Montgomery modular multiplication in a systolic array architecture is used for modular multiplication. The processor consists of special operational blocks for Montgomery modular multiplication, modular addition/subtraction, EC Point doubling/addition, modular multiplicative inversion, EC point multiplier, projective to affine coordinates conversion and Montgomery to normal representation conversion.
AB - This paper describes a hardware implementation of an arithmetic processor which is efficient for bit-lengths suitable for both commonly used types of Public Key Cryptography, i.e., Elliptic Curve (EC) and RSA Cryptosystems. Montgomery modular multiplication in a systolic array architecture is used for modular multiplication. The processor consists of special operational blocks for Montgomery modular multiplication, modular addition/subtraction, EC Point doubling/addition, modular multiplicative inversion, EC point multiplier, projective to affine coordinates conversion and Montgomery to normal representation conversion.
KW - Elliptic curve cryptosystems
KW - FPGA
KW - MMM
KW - Modular operations
KW - Montgomery modular multiplication
UR - http://www.scopus.com/inward/record.url?scp=58149345708&partnerID=8YFLogxK
U2 - 10.1504/IJES.2008.022394
DO - 10.1504/IJES.2008.022394
M3 - Article
AN - SCOPUS:58149345708
SN - 1741-1068
VL - 3
SP - 229
EP - 240
JO - International Journal of Embedded Systems
JF - International Journal of Embedded Systems
IS - 4
ER -