Abstract
We describe a hardware implementation of an arithmetic processor which is efficient for bit-lengths suitable for both commonly used types of public key cryptography (PKC), i.e., elliptic curve (EC) and RSA cryptosystems. Montgomery modular multiplication in a systolic array architecture is used for modular multiplication. The processor consists of special operational blocks for Montgomery modular multiplication, modular addition/subtraction, EC point doubling/addition, modular multiplicative inversion, EC point multiplier, projective to affine coordinates conversion and Montgomery to normal representation conversion.
Original language | English |
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Title of host publication | Proceedings - IEEE International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2003 |
Editors | Ed Deprettere, Shuvra Bhattacharyya, Joseph Cavallaro, Alain Darte, Lothar Thiele |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 433-443 |
Number of pages | 11 |
ISBN (Electronic) | 076951992X |
DOIs | |
Publication status | Published - 2003 |
Externally published | Yes |
Event | IEEE International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2003 - The Hague, Netherlands Duration: 24 Jun 2003 → 26 Jun 2003 |
Publication series
Name | Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors |
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Volume | 2003-January |
ISSN (Print) | 2160-0511 |
ISSN (Electronic) | 2160-052X |
Conference
Conference | IEEE International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2003 |
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Country/Territory | Netherlands |
City | The Hague |
Period | 24/06/03 → 26/06/03 |
Bibliographical note
Publisher Copyright:© 2003 IEEE.
Keywords
- Elliptic Curve Cryptosystems
- FPGA
- Modular Operations