Hardware implementation of an elliptic curve processor over GF(p)

Siddika Berna Örs, Lejla Batina, Bart Preneel, Joos Vandewalle

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

71 Citations (Scopus)

Abstract

We describe a hardware implementation of an arithmetic processor which is efficient for bit-lengths suitable for both commonly used types of public key cryptography (PKC), i.e., elliptic curve (EC) and RSA cryptosystems. Montgomery modular multiplication in a systolic array architecture is used for modular multiplication. The processor consists of special operational blocks for Montgomery modular multiplication, modular addition/subtraction, EC point doubling/addition, modular multiplicative inversion, EC point multiplier, projective to affine coordinates conversion and Montgomery to normal representation conversion.

Original languageEnglish
Title of host publicationProceedings - IEEE International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2003
EditorsEd Deprettere, Shuvra Bhattacharyya, Joseph Cavallaro, Alain Darte, Lothar Thiele
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages433-443
Number of pages11
ISBN (Electronic)076951992X
DOIs
Publication statusPublished - 2003
Externally publishedYes
EventIEEE International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2003 - The Hague, Netherlands
Duration: 24 Jun 200326 Jun 2003

Publication series

NameProceedings of the International Conference on Application-Specific Systems, Architectures and Processors
Volume2003-January
ISSN (Print)2160-0511
ISSN (Electronic)2160-052X

Conference

ConferenceIEEE International Conference on Application-Specific Systems, Architectures, and Processors, ASAP 2003
Country/TerritoryNetherlands
CityThe Hague
Period24/06/0326/06/03

Bibliographical note

Publisher Copyright:
© 2003 IEEE.

Keywords

  • Elliptic Curve Cryptosystems
  • FPGA
  • Modular Operations

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