Abstract
This work introduces an active-only architecture for a meminductor emulator, where the required capacitive behavior is derived solely from the inherent gate capacitances of MOS devices, removing the need for any external capacitors. By avoiding passive elements, the proposed approach notably decreases the silicon area demanded in IC implementations. Validation through Cadence-based simulations using a 0.18 μm CMOS process demonstrates that the practical behavior of the circuit aligns well with the theoretical model and confirms its viability.
| Original language | English |
|---|---|
| Title of host publication | 2025 16th International Conference on Electrical and Electronics Engineering, ELECO 2025 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| ISBN (Electronic) | 9798331546946 |
| DOIs | |
| Publication status | Published - 2025 |
| Event | 2025 16th International Conference on Electrical and Electronics Engineering, ELECO 2025 - Istanbul, Turkey Duration: 27 Nov 2025 → 29 Nov 2025 |
Publication series
| Name | 2025 16th International Conference on Electrical and Electronics Engineering, ELECO 2025 |
|---|
Conference
| Conference | 2025 16th International Conference on Electrical and Electronics Engineering, ELECO 2025 |
|---|---|
| Country/Territory | Turkey |
| City | Istanbul |
| Period | 27/11/25 → 29/11/25 |
Bibliographical note
Publisher Copyright:© 2025 IEEE.
Keywords
- Active meminductor architecture
- Intrinsic-capacitance-based design
- Memory characteristics
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