Full digital implementation of a chaotic time-delay sampled-data system

Keyphrases

• Time Delay 100%
• Sampled-data Systems 100%
• Full Digital 100%
• Digital Implementation 100%
• Digital Design 33%
• Periodic Excitation 33%
• Field Programmable Gate Arrays 33%
• Chaotic Behavior 33%
• Time-varying Delay 33%
• Chaotic System 33%
• Limit Cycle 33%
• Random number Generation 33%
• Jitter 33%
• Chaos-based 33%
• Sensitive Dependence on Initial Conditions 33%
• 8-bit 33%
• Digital Circuits 33%
• Propagation Delay 33%
• Periodic Motion 33%
• Secure Hardware 33%
• Bit Representation 33%

Engineering

• Delay Time 100%
• Sampled Data 100%
• Test Result 50%
• Periodic Behavior 50%
• Random Number 50%
• Initial Condition 50%
• Field Programmable Gate Arrays 50%
• Limit Cycle 50%
• Sampled System 50%
• Bit Representation 50%
• Propagation Delay 50%
• Periodic Motion 50%
• Digital Electronics 50%