Abstract
In signal processing applications, accuracy of the results can be traded-off for reducing area and power consumption. In this work, finite impulse response filters are designed approximately on FPGA. A frequency response error, which can be adjusted depending on the application, is defined to determine approximation level. Coefficient sensitivity is nuMeriçally analysed for this error. With the result obtained from this analysis, a multiple constant multiplication optimization method is executed, with the aim of reducing transposed filter structure areas. The proposed sensitivity analysis and the modified multiple constant multiplication optimization are used in collaboration, on lowpass and bandpass filter realizations. When filter characteristic error tolerances of 0.01 and 0.001 are introduced, an average area reduction of 534% and 3-28% are obtained, respectively.
Translated title of the contribution | Approximate implementation of FIR filters on FPGA |
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Original language | Turkish |
Title of host publication | 26th IEEE Signal Processing and Communications Applications Conference, SIU 2018 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 1-4 |
Number of pages | 4 |
ISBN (Electronic) | 9781538615010 |
DOIs | |
Publication status | Published - 5 Jul 2018 |
Event | 26th IEEE Signal Processing and Communications Applications Conference, SIU 2018 - Izmir, Turkey Duration: 2 May 2018 → 5 May 2018 |
Publication series
Name | 26th IEEE Signal Processing and Communications Applications Conference, SIU 2018 |
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Conference
Conference | 26th IEEE Signal Processing and Communications Applications Conference, SIU 2018 |
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Country/Territory | Turkey |
City | Izmir |
Period | 2/05/18 → 5/05/18 |
Bibliographical note
Publisher Copyright:© 2018 IEEE.