Feasibility conditions on PID controller synthesis using dominant pole assignment

Ilker Ustoglu; M. Turan Soylemez

doi:10.23919/ecc.2007.7068668

Feasibility conditions on PID controller synthesis using dominant pole assignment

Ilker Ustoglu, M. Turan Soylemez

Department of Control and Automation Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Citations (Scopus)

Abstract

This paper presents a method for PID controller design which can achieve dominant pole assignment using two of the controller parameters. The non-dominant poles are restricted on the left of the line s = σH, where σH is the minimum feasible value, called as the feasibility border. It is obvious that a dominant pole assignment is not practical if σH is close to the real parts of the required dominant poles. Hence, finding σH for a given system is very important. The method, which parameterizes all such controllers in order to allow further design criteria, can be applied to other kinds of low-order compensators.

Original language	English
Title of host publication	2007 European Control Conference, ECC 2007
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	483-489
Number of pages	7
ISBN (Electronic)	9783952417386
DOIs	https://doi.org/10.23919/ecc.2007.7068668
Publication status	Published - 2007
Event	2007 9th European Control Conference, ECC 2007 - Kos, Greece Duration: 2 Jul 2007 → 5 Jul 2007

Publication series

Name	2007 European Control Conference, ECC 2007

Conference

Conference	2007 9th European Control Conference, ECC 2007
Country/Territory	Greece
City	Kos
Period	2/07/07 → 5/07/07

Bibliographical note

Publisher Copyright:
© 2007 EUCA.

Access to Document

10.23919/ecc.2007.7068668

Cite this

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title = "Feasibility conditions on PID controller synthesis using dominant pole assignment",

abstract = "This paper presents a method for PID controller design which can achieve dominant pole assignment using two of the controller parameters. The non-dominant poles are restricted on the left of the line s = σH, where σH is the minimum feasible value, called as the feasibility border. It is obvious that a dominant pole assignment is not practical if σH is close to the real parts of the required dominant poles. Hence, finding σH for a given system is very important. The method, which parameterizes all such controllers in order to allow further design criteria, can be applied to other kinds of low-order compensators.",

author = "Ilker Ustoglu and Soylemez, \{M. Turan\}",

note = "Publisher Copyright: {\textcopyright} 2007 EUCA.; 2007 9th European Control Conference, ECC 2007 ; Conference date: 02-07-2007 Through 05-07-2007",

year = "2007",

doi = "10.23919/ecc.2007.7068668",

language = "English",

series = "2007 European Control Conference, ECC 2007",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "483--489",

booktitle = "2007 European Control Conference, ECC 2007",

address = "United States",

}

Ustoglu, I & Soylemez, MT 2007, Feasibility conditions on PID controller synthesis using dominant pole assignment. in 2007 European Control Conference, ECC 2007., 7068668, 2007 European Control Conference, ECC 2007, Institute of Electrical and Electronics Engineers Inc., pp. 483-489, 2007 9th European Control Conference, ECC 2007, Kos, Greece, 2/07/07. https://doi.org/10.23919/ecc.2007.7068668

Feasibility conditions on PID controller synthesis using dominant pole assignment. / Ustoglu, Ilker ; Soylemez, M. Turan.
2007 European Control Conference, ECC 2007. Institute of Electrical and Electronics Engineers Inc., 2007. p. 483-489 7068668 (2007 European Control Conference, ECC 2007).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Ustoglu, Ilker

AU - Soylemez, M. Turan

PY - 2007

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N2 - This paper presents a method for PID controller design which can achieve dominant pole assignment using two of the controller parameters. The non-dominant poles are restricted on the left of the line s = σH, where σH is the minimum feasible value, called as the feasibility border. It is obvious that a dominant pole assignment is not practical if σH is close to the real parts of the required dominant poles. Hence, finding σH for a given system is very important. The method, which parameterizes all such controllers in order to allow further design criteria, can be applied to other kinds of low-order compensators.

AB - This paper presents a method for PID controller design which can achieve dominant pole assignment using two of the controller parameters. The non-dominant poles are restricted on the left of the line s = σH, where σH is the minimum feasible value, called as the feasibility border. It is obvious that a dominant pole assignment is not practical if σH is close to the real parts of the required dominant poles. Hence, finding σH for a given system is very important. The method, which parameterizes all such controllers in order to allow further design criteria, can be applied to other kinds of low-order compensators.

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U2 - 10.23919/ecc.2007.7068668

DO - 10.23919/ecc.2007.7068668

M3 - Conference contribution

AN - SCOPUS:84927748456

T3 - 2007 European Control Conference, ECC 2007

SP - 483

EP - 489

BT - 2007 European Control Conference, ECC 2007

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2007 9th European Control Conference, ECC 2007

Y2 - 2 July 2007 through 5 July 2007

ER -

Feasibility conditions on PID controller synthesis using dominant pole assignment

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