Design of a high-linear, high-precision analog multiplier, free from body effect

Ali Naderi Saatlo*, Ismail Serdar Özoǧuz

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

17 Citations (Scopus)


In this paper, a new CMOS four-quadrant analog multiplier circuit is proposed, based on a pair of dual- Translinear loops. The significant features of the circuit are its high accuracy and high linearity as well as its body effect-free operation, owing to the fact that the circuit relies on a new dual-translinear topology. In addition, harmonic distortions are precisely discussed due to their conceivable mismatches, including transconductance and threshold voltage of the transistors. HSPICE postlayout simulation results are presented to verify the validity of the theoretical analysis, where under a supply voltage of 2.8 V, the bandwidth of the proposed multiplier is 137 MHz, and the corresponding maximum linearity error remains as low as 1.12%. Moreover, the power dissipation of the proposed circuit is found to be 521 W. The presented multiplier is expected to be useful in the design of various analog signal processing applications such as modulators and frequency doublers, as illustrated in this paper.

Original languageEnglish
Pages (from-to)820-832
Number of pages13
JournalTurkish Journal of Electrical Engineering and Computer Sciences
Issue number3
Publication statusPublished - 2016

Bibliographical note

Publisher Copyright:


  • Analog multipliers
  • Body effect
  • Current-mode circuits
  • Translinear circuits


Dive into the research topics of 'Design of a high-linear, high-precision analog multiplier, free from body effect'. Together they form a unique fingerprint.

Cite this