Derating for static timing analysis: Theory and practicev

Ali Dasdan*, Santanu Kolay, Mustafa Yazgan

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

3 Citations (Scopus)

Abstract

Derating is a versatile technique supported by all static timing analysis (STA) tools in industry. In essence, it enables designers to modify any delay or slew computation performed by such tools. Despite this common use in industry, the scientific literature on derating is scarce to none. This has led to its incorrect use, misunderstanding, and even dismissal. This situation has also been exacerbated with the emergence of statistical STA. This paper is our attempt to -ll this void in the literature. We review the use of derating in the context of STA, discuss the important issues, and provide answers to its correct use. We also provide experimental results to justify our claims. Our contribution builds a theoretical and practical foundation to help designers get more insight into derating

Original languageEnglish
Title of host publicationProceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009
Pages719-727
Number of pages9
DOIs
Publication statusPublished - 2009
Externally publishedYes
Event10th International Symposium on Quality Electronic Design, ISQED 2009 - San Jose, CA, United States
Duration: 16 Mar 200918 Mar 2009

Publication series

NameProceedings of the 10th International Symposium on Quality Electronic Design, ISQED 2009

Conference

Conference10th International Symposium on Quality Electronic Design, ISQED 2009
Country/TerritoryUnited States
CitySan Jose, CA
Period16/03/0918/03/09

Keywords

  • Derating
  • Electronic design automation
  • Static timing analysis
  • Timing library

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