Abstract
Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.
Original language | English |
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Title of host publication | SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 21-24 |
Number of pages | 4 |
ISBN (Electronic) | 9781728112015 |
DOIs | |
Publication status | Published - Jul 2019 |
Event | 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019 - Lausanne, Switzerland Duration: 15 Jul 2019 → 18 Jul 2019 |
Publication series
Name | SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings |
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Conference
Conference | 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019 |
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Country/Territory | Switzerland |
City | Lausanne |
Period | 15/07/19 → 18/07/19 |
Bibliographical note
Publisher Copyright:© 2019 IEEE.
Keywords
- ELT
- process variation
- radiation gamma rays
- TID