Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process

Sadik Ilik; Nergiz Şahin Solmaz; Aykut Kabaoǧlu; Mustafa Berke Yelten

doi:10.1109/SMACD.2019.8795230

Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process

Sadik Ilik, Nergiz Şahin Solmaz, Aykut Kabaoǧlu, Mustafa Berke Yelten

Department of Electronics and Communication Engineering

Istanbul Technical University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.

Original language	English
Title of host publication	SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	21-24
Number of pages	4
ISBN (Electronic)	9781728112015
DOIs	https://doi.org/10.1109/SMACD.2019.8795230
Publication status	Published - Jul 2019
Event	16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019 - Lausanne, Switzerland Duration: 15 Jul 2019 → 18 Jul 2019

Publication series

Name	SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings

Conference

Conference	16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019
Country/Territory	Switzerland
City	Lausanne
Period	15/07/19 → 18/07/19

Bibliographical note

Publisher Copyright:
© 2019 IEEE.

Funding

ACKNOWLEDGMENT This work was sponsored by the Technological Research Council of Turkey under the project TÜB˙TAK 1001 215E080. The authors would like to thank to Prof. Sevilay Hacıyakupog˘lu for valuable technical discussions, as well as, to the Turkish Atomic Energy Authority, particularly Mr. Zati Ünal, for his kind technical help during preparation of the experimental setup. This work was sponsored by the Technological Research Council of Turkey under the project TUBITAK 1001 215E080. The authors would like to thank to Prof. Sevilay Haciyakupo?lu for valuable technical discussions, as well as, to the Turkish Atomic Energy Authority, particularly Mr. Zati ?nal, for his kind technical help during preparation of the experimental setup.

Funders	Funder number
Technological Research Council of Turkey	TÜB˙TAK 1001 215E080
Türkiye Atom Enerjisi Kurumu

Keywords

ELT
process variation
radiation gamma rays
TID

Access to Document

10.1109/SMACD.2019.8795230

Cite this

Ilik, S., Şahin Solmaz, N., Kabaoǧlu, A., & Yelten, M. B. (2019). Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. In SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings (pp. 21-24). Article 8795230 (SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/SMACD.2019.8795230

Ilik, Sadik ; Şahin Solmaz, Nergiz ; Kabaoǧlu, Aykut et al. / Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 21-24 (SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings).

@inproceedings{f27128adcfcc4f3e9f9967afd0d1924c,

title = "Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process",

abstract = "Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.",

keywords = "ELT, process variation, radiation gamma rays, TID",

author = "Sadik Ilik and {{\c S}ahin Solmaz}, Nergiz and Aykut Kabaoǧlu and Yelten, {Mustafa Berke}",

note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019 ; Conference date: 15-07-2019 Through 18-07-2019",

year = "2019",

month = jul,

doi = "10.1109/SMACD.2019.8795230",

language = "English",

series = "SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "21--24",

booktitle = "SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings",

address = "United States",

}

Ilik, S, Şahin Solmaz, N, Kabaoǧlu, A & Yelten, MB 2019, Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. in SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings., 8795230, SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings, Institute of Electrical and Electronics Engineers Inc., pp. 21-24, 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019, Lausanne, Switzerland, 15/07/19. https://doi.org/10.1109/SMACD.2019.8795230

Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. / Ilik, Sadik; Şahin Solmaz, Nergiz; Kabaoǧlu, Aykut et al.
SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings. Institute of Electrical and Electronics Engineers Inc., 2019. p. 21-24 8795230 (SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process

AU - Ilik, Sadik

AU - Şahin Solmaz, Nergiz

AU - Kabaoǧlu, Aykut

AU - Yelten, Mustafa Berke

PY - 2019/7

Y1 - 2019/7

N2 - Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.

AB - Radiation tolerance of electronic devices and systems is mandatory for defence and space applications. In order to increase this tolerance for CMOS FETs, different layout techniques such as enclosed layout transistors (ELTs) can be employed. In this paper, a regular layout transistor is compared with two ELTs, which have square and octagonal shaped gates. For this purpose, a test circuit in 180 nm device technology has been designed and fabricated. Experimental comparison of the same size transistors with different layouts is performed in terms of the impact of process variations, and radiation tolerance. It is concluded that ELTs with different shapes behave similarly under radiation at least upto a dose of 1 Mrad. Furthermore, octagonal shaped ELTs are slightly less impacted from process variations in regard to square ELTs.

KW - ELT

KW - process variation

KW - radiation gamma rays

KW - TID

UR - http://www.scopus.com/inward/record.url?scp=85071544716&partnerID=8YFLogxK

U2 - 10.1109/SMACD.2019.8795230

DO - 10.1109/SMACD.2019.8795230

M3 - Conference contribution

AN - SCOPUS:85071544716

T3 - SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings

SP - 21

EP - 24

BT - SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, SMACD 2019

Y2 - 15 July 2019 through 18 July 2019

ER -

Ilik S, Şahin Solmaz N, Kabaoǧlu A, Yelten MB. Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process. In SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings. Institute of Electrical and Electronics Engineers Inc. 2019. p. 21-24. 8795230. (SMACD 2019 - 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Proceedings). doi: 10.1109/SMACD.2019.8795230

Comparison of ELTs with different shapes and a regular layout transistor in 180 nm CMOS process

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Keywords

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