CMOS high-precision loser-take-all circuit

Ali Naderi Saatlo*, Serdar Ozoguz

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

9 Citations (Scopus)

Abstract

This paper presents a new current-mode CMOS loser-take-all circuit. The proposed circuit consists of a basic cell that allows implementation of a multi-input configuration by repeating the cell for each additional input. A high-speed feedback structure is employed to determine the minimum current among the applied inputs. The significant feature of the circuit is its high accuracy and high-speed operation. Additionally, the input dynamic range of the circuit can be efficiently controlled via the biasing current. HSPICE simulation results are presented to verify the performance of the circuit, where under a supply voltage of 2.5 V, bias current of 100 μA, and frequency of 10 MHz, the input dynamic range increases within 0-100 μA and the corresponding error remains as low as 0.4%.

Original languageEnglish
Pages (from-to)695-696
Number of pages2
JournalIEEJ Transactions on Electrical and Electronic Engineering
Volume9
Issue number6
DOIs
Publication statusPublished - 1 Nov 2014

Bibliographical note

Publisher Copyright:
© 2014 Institute of Electrical Engineers of Japan.

Keywords

  • Current mode
  • Fuzzy controller
  • Loser-take-all
  • Winner-take-all

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