Accurate synthesis of arithmetic operations with stochastic logic

Ensar Vahapoglu; Mustafa Altun

doi:10.1109/ISVLSI.2016.74

Accurate synthesis of arithmetic operations with stochastic logic

Ensar Vahapoglu, Mustafa Altun

Department of Electronics and Communication Engineering

Istanbul Technical University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

9 Citations (Scopus)

Abstract

In this study, we propose a method to overcome the main drawback in stochastic computing, low accuracy or related long computing times. Our method exploits dependency in stochastic bit streams with the aid of feedback mechanisms. Accurate (error-free) arithmetic multiplier and adder circuits are implemented. Operations are performed using both stochastic and binary inputs/outputs, binary-stochastic number conversion circuits are implemented for this purpose. We test our circuits by considering performance parameters area, delay, and accuracy. The simulation results are evaluated in a comparison with the results of other stochastic and deterministic (conventional) computing techniques in the literature. Additionally, we discuss the applicability of our method in emerging technologies including printed/flexible electronics for which low transistor counts is desired.

Original language	English
Title of host publication	Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016
Publisher	IEEE Computer Society
Pages	415-420
Number of pages	6
ISBN (Electronic)	9781467390385
DOIs	https://doi.org/10.1109/ISVLSI.2016.74
Publication status	Published - 2 Sept 2016
Event	15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016 - Pittsburgh, United States Duration: 11 Jul 2016 → 13 Jul 2016

Publication series

Name	Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume	2016-September
ISSN (Print)	2159-3469
ISSN (Electronic)	2159-3477

Conference

Conference	15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016
Country/Territory	United States
City	Pittsburgh
Period	11/07/16 → 13/07/16

Bibliographical note

Publisher Copyright:
© 2016 IEEE.

Keywords

accuracy
arithmetic circuits
performance optimization
printed electronics
Stochastic computing

Access to Document

10.1109/ISVLSI.2016.74

Cite this

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title = "Accurate synthesis of arithmetic operations with stochastic logic",

abstract = "In this study, we propose a method to overcome the main drawback in stochastic computing, low accuracy or related long computing times. Our method exploits dependency in stochastic bit streams with the aid of feedback mechanisms. Accurate (error-free) arithmetic multiplier and adder circuits are implemented. Operations are performed using both stochastic and binary inputs/outputs, binary-stochastic number conversion circuits are implemented for this purpose. We test our circuits by considering performance parameters area, delay, and accuracy. The simulation results are evaluated in a comparison with the results of other stochastic and deterministic (conventional) computing techniques in the literature. Additionally, we discuss the applicability of our method in emerging technologies including printed/flexible electronics for which low transistor counts is desired.",

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author = "Ensar Vahapoglu and Mustafa Altun",

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doi = "10.1109/ISVLSI.2016.74",

language = "English",

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Vahapoglu, E & Altun, M 2016, Accurate synthesis of arithmetic operations with stochastic logic. in Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016., 7560233, Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI, vol. 2016-September, IEEE Computer Society, pp. 415-420, 15th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016, Pittsburgh, United States, 11/07/16. https://doi.org/10.1109/ISVLSI.2016.74

Accurate synthesis of arithmetic operations with stochastic logic. / Vahapoglu, Ensar; Altun, Mustafa.
Proceedings - IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2016. IEEE Computer Society, 2016. p. 415-420 7560233 (Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI; Vol. 2016-September).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - In this study, we propose a method to overcome the main drawback in stochastic computing, low accuracy or related long computing times. Our method exploits dependency in stochastic bit streams with the aid of feedback mechanisms. Accurate (error-free) arithmetic multiplier and adder circuits are implemented. Operations are performed using both stochastic and binary inputs/outputs, binary-stochastic number conversion circuits are implemented for this purpose. We test our circuits by considering performance parameters area, delay, and accuracy. The simulation results are evaluated in a comparison with the results of other stochastic and deterministic (conventional) computing techniques in the literature. Additionally, we discuss the applicability of our method in emerging technologies including printed/flexible electronics for which low transistor counts is desired.

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Accurate synthesis of arithmetic operations with stochastic logic

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Keywords

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