Abstract
In this paper a random number generation method based on a piecewise linear one dimensional (PL1D) discrete time chaotic maps is proposed for applications in cryptography and steganography. Appropriate parameters are determined by examining the distribution of underlying chaotic signal and random number generator (RNG) is numerically verified by four fundamental statistical test of FIPS 140-2. Proposed design is practically realized on the field programmable analog and digital arrays (FPAA-FPGA). Finally it is experimentally verified that the presented RNG fulfills the NIST 800-22 randomness test without post processing.
Original language | English |
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Title of host publication | 2017 IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 1212-1215 |
Number of pages | 4 |
ISBN (Electronic) | 9781509063895 |
DOIs | |
Publication status | Published - 27 Sept 2017 |
Event | 60th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2017 - Boston, United States Duration: 6 Aug 2017 → 9 Aug 2017 |
Publication series
Name | Midwest Symposium on Circuits and Systems |
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Volume | 2017-August |
ISSN (Print) | 1548-3746 |
Conference
Conference | 60th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2017 |
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Country/Territory | United States |
City | Boston |
Period | 6/08/17 → 9/08/17 |
Bibliographical note
Publisher Copyright:© 2017 IEEE.