A power-managed protocol processor for wireless sensor networks

M. Sheets; F. Burghardt; T. Karalar; J. Ammer; Y. H. Chee; J. Rabaey

A power-managed protocol processor for wireless sensor networks

M. Sheets^*, F. Burghardt, T. Karalar, J. Ammer, Y. H. Chee, J. Rabaey

^*Corresponding author for this work

University of California at Berkeley

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

24 Citations (Scopus)

Abstract

Wireless sensor network applications, such as environmental control in smart building and ecological monitoring, require low-power nodes that operate their entire lifetime without changing batteries. This paper describes the power management architecture for a digital protocol processor for a sensor network node. Eight subsystems implement the baseband through application protocol layers and are controlled by a centralized power manager. The prototype chip, implemented in 130nm CMOS, operates at 1.0V with an average power consumption of 150μW during normal operation.

Original language	English
Title of host publication	2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers
Pages	212-213
Number of pages	2
Publication status	Published - 2006
Externally published	Yes
Event	2006 Symposium on VLSI Circuits, VLSIC - Honolulu, HI, United States Duration: 15 Jun 2006 → 17 Jun 2006

Publication series

Name	IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Conference

Conference	2006 Symposium on VLSI Circuits, VLSIC
Country/Territory	United States
City	Honolulu, HI
Period	15/06/06 → 17/06/06

Keywords

Power management and MT-CMOS
Wireless sensor networks

Cite this

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title = "A power-managed protocol processor for wireless sensor networks",

abstract = "Wireless sensor network applications, such as environmental control in smart building and ecological monitoring, require low-power nodes that operate their entire lifetime without changing batteries. This paper describes the power management architecture for a digital protocol processor for a sensor network node. Eight subsystems implement the baseband through application protocol layers and are controlled by a centralized power manager. The prototype chip, implemented in 130nm CMOS, operates at 1.0V with an average power consumption of 150μW during normal operation.",

keywords = "Power management and MT-CMOS, Wireless sensor networks",

author = "M. Sheets and F. Burghardt and T. Karalar and J. Ammer and Chee, {Y. H.} and J. Rabaey",

year = "2006",

language = "English",

isbn = "1424400066",

series = "IEEE Symposium on VLSI Circuits, Digest of Technical Papers",

pages = "212--213",

booktitle = "2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers",

note = "2006 Symposium on VLSI Circuits, VLSIC ; Conference date: 15-06-2006 Through 17-06-2006",

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Sheets, M, Burghardt, F, Karalar, T, Ammer, J, Chee, YH & Rabaey, J 2006, A power-managed protocol processor for wireless sensor networks. in 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers., 1705385, IEEE Symposium on VLSI Circuits, Digest of Technical Papers, pp. 212-213, 2006 Symposium on VLSI Circuits, VLSIC, Honolulu, HI, United States, 15/06/06.

A power-managed protocol processor for wireless sensor networks. / Sheets, M.; Burghardt, F.; Karalar, T. et al.
2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers. 2006. p. 212-213 1705385 (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - A power-managed protocol processor for wireless sensor networks

AU - Sheets, M.

AU - Burghardt, F.

AU - Karalar, T.

AU - Ammer, J.

AU - Chee, Y. H.

AU - Rabaey, J.

PY - 2006

Y1 - 2006

N2 - Wireless sensor network applications, such as environmental control in smart building and ecological monitoring, require low-power nodes that operate their entire lifetime without changing batteries. This paper describes the power management architecture for a digital protocol processor for a sensor network node. Eight subsystems implement the baseband through application protocol layers and are controlled by a centralized power manager. The prototype chip, implemented in 130nm CMOS, operates at 1.0V with an average power consumption of 150μW during normal operation.

AB - Wireless sensor network applications, such as environmental control in smart building and ecological monitoring, require low-power nodes that operate their entire lifetime without changing batteries. This paper describes the power management architecture for a digital protocol processor for a sensor network node. Eight subsystems implement the baseband through application protocol layers and are controlled by a centralized power manager. The prototype chip, implemented in 130nm CMOS, operates at 1.0V with an average power consumption of 150μW during normal operation.

KW - Power management and MT-CMOS

KW - Wireless sensor networks

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M3 - Conference contribution

AN - SCOPUS:39749175061

SN - 1424400066

SN - 9781424400065

T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers

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BT - 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers

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ER -

A power-managed protocol processor for wireless sensor networks

Abstract

Publication series

Conference

Keywords

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