A novel template-based multimedia processor array and its toolset

Mehmet Tukel, Arda Yurdakul, Berna Ors

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this paper, we propose a template-based multimedia processor array and its design framework. The configurable processor array is designed for low-cost, low-power image/ video processing applications. Each processor in the array is template-based and implemented by considering the nature and specifications of image/video processing domain. The framework can set the size of the network and the parameters of the building blocks of each processor. Hence, the generated architecture occupies only the necessary amount of logic. To show the scalability and the performance of the design, different instances of the architecture implementing four test applications are generated. We have obtained better or comparable results in terms of energy consumption, throughput and area occupation compared to that of the similar architectures in literature.

Original languageEnglish
Title of host publication2017 10th International Conference on Electrical and Electronics Engineering, ELECO 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages437-441
Number of pages5
ISBN (Electronic)9786050107371
Publication statusPublished - 2 Jul 2017
Event10th International Conference on Electrical and Electronics Engineering, ELECO 2017 - Bursa, Turkey
Duration: 29 Nov 20172 Dec 2017

Publication series

Name2017 10th International Conference on Electrical and Electronics Engineering, ELECO 2017
Volume2018-January

Conference

Conference10th International Conference on Electrical and Electronics Engineering, ELECO 2017
Country/TerritoryTurkey
CityBursa
Period29/11/172/12/17

Bibliographical note

Publisher Copyright:
© 2017 EMO (Turkish Chamber of Electrical Enginners).

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