A new low voltage CMOS differential OTRA for sub-micron technologies

Alper Duruk; Ece Olcay Güneş; Hakan Kuntman

doi:10.1016/j.aeue.2006.05.009

A new low voltage CMOS differential OTRA for sub-micron technologies

Alper Duruk, Ece Olcay Güneş^*, Hakan Kuntman

^*Corresponding author for this work

Department of Electronics and Communication Engineering

Research output: Contribution to journal › Article › peer-review

8 Citations (Scopus)

Abstract

In this study, a new CMOS differential operational transresistance amplifier (OTRA) topology is proposed. This topology can operate with a very low voltage power supply as 1.2 V. In this design, CMOS 0.13 μ m STMicroelectronics technology transistor models are used for the simulations. The designed CMOS OTRA has a transresistance gain (Rm) of 38 660 V/A with a bandwidth (- 3 dB) of 29.2 MHz. To demonstrate the performance of the OTRA, designed universal MOS-C filter employing two CMOS differential OTRA are tested with CADENCE simulation program to verify the theoretical results.

Original language	English
Pages (from-to)	291-299
Number of pages	9
Journal	AEU - International Journal of Electronics and Communications
Volume	61
Issue number	5
DOIs	https://doi.org/10.1016/j.aeue.2006.05.009
Publication status	Published - 2 May 2007

Keywords

Low voltage
OTRA
Sub-micron
Universal filter

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10.1016/j.aeue.2006.05.009

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abstract = "In this study, a new CMOS differential operational transresistance amplifier (OTRA) topology is proposed. This topology can operate with a very low voltage power supply as 1.2 V. In this design, CMOS 0.13 μ m STMicroelectronics technology transistor models are used for the simulations. The designed CMOS OTRA has a transresistance gain (Rm) of 38 660 V/A with a bandwidth (- 3 dB) of 29.2 MHz. To demonstrate the performance of the OTRA, designed universal MOS-C filter employing two CMOS differential OTRA are tested with CADENCE simulation program to verify the theoretical results.",

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AU - Güneş, Ece Olcay

AU - Kuntman, Hakan

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N2 - In this study, a new CMOS differential operational transresistance amplifier (OTRA) topology is proposed. This topology can operate with a very low voltage power supply as 1.2 V. In this design, CMOS 0.13 μ m STMicroelectronics technology transistor models are used for the simulations. The designed CMOS OTRA has a transresistance gain (Rm) of 38 660 V/A with a bandwidth (- 3 dB) of 29.2 MHz. To demonstrate the performance of the OTRA, designed universal MOS-C filter employing two CMOS differential OTRA are tested with CADENCE simulation program to verify the theoretical results.

AB - In this study, a new CMOS differential operational transresistance amplifier (OTRA) topology is proposed. This topology can operate with a very low voltage power supply as 1.2 V. In this design, CMOS 0.13 μ m STMicroelectronics technology transistor models are used for the simulations. The designed CMOS OTRA has a transresistance gain (Rm) of 38 660 V/A with a bandwidth (- 3 dB) of 29.2 MHz. To demonstrate the performance of the OTRA, designed universal MOS-C filter employing two CMOS differential OTRA are tested with CADENCE simulation program to verify the theoretical results.

KW - Low voltage

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KW - Sub-micron

KW - Universal filter

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JO - AEU - International Journal of Electronics and Communications

JF - AEU - International Journal of Electronics and Communications

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A new low voltage CMOS differential OTRA for sub-micron technologies

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Keywords

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