Abstract
—Cellular Neural Network with time invariant weights is being used in computer vision applications. There are many ways to implement CNNs for real time image processing. VLSI and FPGA technologies are getting better day by day. In our study we improved our previous system-on-chip implementation of CNNs. Improved CNN system-on-chip processor is built on an improved CNN emulator design and a better processor core which performs a new template learning algorithm is shown. SoC is programmed to perform a sequential CNN operations on different input and state images with different templates which are now can be stored in DDR2 RAM. Upgraded system design allows that templates can be more dynamically updated by the new learning algoritm in run time. System is implemented on Spartan 6 FPGA and tests results are presented and compared.
Original language | English |
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Title of host publication | CNNA 2018 - 16th International Workshop on Cellular Nanoscale Networks and Their Applications |
Editors | Akos Zarandy |
Publisher | IEEE Computer Society |
Pages | 103 |
Number of pages | 1 |
ISBN (Electronic) | 9783800747665 |
Publication status | Published - 2018 |
Event | 16th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2018 - Budapest, Hungary Duration: 28 Aug 2018 → 30 Aug 2018 |
Publication series
Name | International Workshop on Cellular Nanoscale Networks and their Applications |
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Volume | 2018-August |
ISSN (Print) | 2165-0160 |
ISSN (Electronic) | 2165-0179 |
Conference
Conference | 16th International Workshop on Cellular Nanoscale Networks and Their Applications, CNNA 2018 |
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Country/Territory | Hungary |
City | Budapest |
Period | 28/08/18 → 30/08/18 |
Bibliographical note
Publisher Copyright:© VDE VERLAG GMBH.
Funding
VI. ACKNOWLEDGMENTS This work was supported by Istanbul Technical University, under the project MGA-2017-40679 and ITU-AYP-2017-07.
Funders | Funder number |
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Istanbul Teknik Üniversitesi | ITU-AYP-2017-07, MGA-2017-40679 |